PIC18C242-I/SP Microchip Technology, PIC18C242-I/SP Datasheet - Page 178

IC MCU OTP 8KX16 A/D 28DIP

PIC18C242-I/SP

Manufacturer Part Number
PIC18C242-I/SP
Description
IC MCU OTP 8KX16 A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C242-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
22
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
23
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
MSSP, SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DB18C452 - BOARD DAUGHTER ICEPIC3
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18CXX2
17.2
Depending on the power source for the device voltage,
the voltage normally decreases relatively slowly. This
means that the LVD module does not need to be con-
stantly operating. To decrease the current require-
ments, the LVD circuitry only needs to be enabled for
short periods, where the voltage is checked. After
doing the check, the LVD module may be disabled.
Each time that the LVD module is enabled, the circuitry
requires some time to stabilize. After the circuitry has
stabilized, all status flags may be cleared. The module
will then indicate the proper state of the system.
FIGURE 17-4:
DS39026C-page 176
Internally Generated
Internally Generated
Reference stable
Reference stable
Operation
CASE 1:
CASE 2:
Enable LVD
Enable LVD
LVDIF
LVDIF
V
V
DD
DD
LOW VOLTAGE DETECT WAVEFORMS
50 ms
50 ms
LVDIF may not be set
The following steps are needed to set up the LVD module:
1.
2.
3.
4.
5.
6.
Figure 17-4 shows typical waveforms that the LVD
module may be used to detect.
LVDIF cleared in software,
LVDIF remains set since LVD condition still exists
Write the value to the LVDL3:LVDL0 bits (LVD-
CON register), which selects the desired LVD
Trip Point.
Ensure that LVD interrupts are disabled (the
LVDIE bit is cleared, or the GIE bit is cleared).
Enable the LVD module (set the LVDEN bit in
the LVDCON register).
Wait for the LVD module to stabilize (the IRVST
bit to become set).
Clear the LVD interrupt flag, which may have
falsely become set until the LVD module has
stabilized (clear the LVDIF bit).
Enable the LVD interrupt (set the LVDIE and the
GIE bits).
LVDIF cleared in software
2000 Microchip Technology Inc.
LVDIF cleared in software
V
V
LVD
LVD

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