PIC18C242-I/SP Microchip Technology, PIC18C242-I/SP Datasheet - Page 257

• Manufacturer Part Number: PIC18C242-I/SP
• Description: IC MCU OTP 8KX16 A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C242-I/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 23
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: MSSP, SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18C452 - BOARD DAUGHTER ICEPIC3
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 21-15:
TABLE 21-14: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1: Requires the use of Parameter # 73A.
Param.
2001 Microchip Technology Inc.
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDI
SS
SCK
SCK
SDO
2: Only if Parameter # 71A and # 72A are used.
TssL2scH,
TssL2scL
TscH
TscL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
B
Symbol
Refer to Figure 21-4 for load conditions.
2
B
82
SS to SCK or SCK input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Last clock edge of Byte1 to the first clock edge of Byte2 1.5T
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK
edge
SDO data output valid after SS
edge
SS
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
after SCK edge
MSb IN
MSb
74
71
75, 76
Characteristic
72
BIT6 - - - - - -1
BIT6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18CXXX
PIC18LCXXX
PIC18CXXX
PIC18LCXXX
PIC18CXXX
PIC18LCXXX
PIC18CXXX
PIC18LCXXX
80
LSb
LSb IN
1.25T
1.25T
1.5T
Min
100
T
CY
CY
40
40
10
—
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 40
83
+ 30
+ 30
PIC18CXX2
77
Max Units Conditions
100
100
50
—
—
—
—
—
—
—
25
45
25
25
45
25
50
50
—
DS39026C-page 255
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)