PIC18C242-I/SP Microchip Technology, PIC18C242-I/SP Datasheet - Page 294

• Manufacturer Part Number: PIC18C242-I/SP
• Description: IC MCU OTP 8KX16 A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C242-I/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 23
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: MSSP, SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18C452 - BOARD DAUGHTER ICEPIC3
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18CXX2
Code Examples
Code Protection ....................................................... 179, 186
COMF ............................................................................... 204
Compare (CCP Module) ................................................... 110
Configuration Bits ............................................................. 179
Context Saving During Interrupts ....................................... 75
Conversion Considerations .............................................. 288
CPFSEQ .......................................................................... 204
CPFSGT ........................................................................... 205
CPFSLT ........................................................................... 205
D
Data Memory ...................................................................... 42
DAW ................................................................................. 206
DC Characteristics ................................................... 237, 240
DECF ............................................................................... 206
DECFSNZ ........................................................................ 207
DECFSZ ........................................................................... 207
Device Differences ........................................................... 287
Direct Addressing ............................................................... 51
E
Electrical Characteristics .................................................. 235
Errata ................................................................................... 5
F
Firmware Instructions ....................................................... 187
G
General Call Address Sequence ...................................... 133
General Call Address Support ......................................... 133
GOTO ............................................................................... 208
DS39026C-page 292
16 x 16 Signed Multiply Routine ................................ 62
16 x 16 Unsigned Multiply Routine ............................ 62
8 x 8 Signed Multiply Routine .................................... 61
8 x 8 Unsigned Multiply Routine ................................ 61
Changing Between Capture Prescalers ................... 109
Fast Register Stack .................................................... 39
Initializing PORTA ...................................................... 77
Initializing PORTB ...................................................... 80
Initializing PORTC ...................................................... 83
Initializing PORTD ...................................................... 85
Initializing PORTE ...................................................... 87
Loading the SSPBUF Register ................................ 122
Saving STATUS, WREG and BSR Registers
Associated Registers ............................................... 111
Block Diagram .......................................................... 110
CCP Pin Configuration ............................................. 110
CCPR1H:CCPR1L Registers ................................... 110
Software Interrupt .................................................... 110
Special Event Trigger ......................... 99, 105, 110, 171
Timer1 Mode Selection ............................................ 110
Example Code ........................................................... 75
General Purpose Registers ........................................ 42
Special Function Registers ........................................ 42
in RAM ............................................................... 75
I
I/O Ports ............................................................................. 77
I
I
I
I
ICEPIC In-Circuit Emulator .............................................. 230
ID Locations ............................................................. 179, 186
INCF ................................................................................ 208
INCFSZ ............................................................................ 209
In-Circuit Serial Programming (ICSP) ...................... 179, 186
Indirect Addressing ............................................................ 51
INFSNZ ............................................................................ 209
Instruction Cycle ................................................................ 39
Instruction Flow/Pipelining ................................................. 40
Instruction Format ............................................................ 189
2
2
2
2
C (SSP Module) ............................................................ 128
C Master Mode Reception ............................................ 139
C Master Mode Repeated START Condition ................ 138
C Module
ACK Pulse ....................................................... 128, 129
Addressing ............................................................... 129
Block Diagram ......................................................... 128
Read/Write Bit Information (R/W Bit) ....................... 129
Reception ................................................................ 129
Serial Clock (RC3/SCK/SCL) ................................... 129
Slave Mode .............................................................. 128
Timing Diagram, Data .............................................. 257
Timing Diagram, START/STOP Bits ........................ 256
Transmission ........................................................... 129
Acknowledge Sequence Timing .............................. 142
Baud Rate Generator
Block Diagram
BRG Reset Due to SDA Collision ............................ 146
BRG Timing ............................................................. 136
Bus Collision
Bus Collision Timing ................................................ 144
Clock Arbitration ...................................................... 143
Clock Arbitration Timing (Master Transmit) ............. 143
General Call Address Support ................................. 133
Master Mode 7-bit Reception Timing ....................... 141
Master Mode Operation ........................................... 135
Master Mode START Condition ............................... 137
Master Mode Transmission ..................................... 139
Master Mode Transmit Sequence ............................ 135
Multi-Master Mode ................................................... 144
Repeat START Condition Timing ............................ 138
STOP Condition Receive or Transmit Timing .......... 143
STOP Condition Timing ........................................... 142
Waveforms for 7-bit Reception ................................ 130
Waveforms for 7-bit Transmission ........................... 130
FSR Register ............................................................. 50
Baud Rate Generator ...................................... 136
Acknowledge ................................................... 144
Repeated START Condition ............................ 147
Repeated START Condition Timing
Repeated START Condition Timing
START Condition ............................................. 145
START Condition Timing ......................... 145, 146
STOP Condition ............................................... 148
STOP Condition Timing (Case 1) .................... 148
STOP Condition Timing (Case 2) .................... 148
Transmit Timing ............................................... 144
(Case 1) ................................................... 147
(Case 2) ................................................... 147
2001 Microchip Technology Inc.