MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 145

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

9.8.5 USB Control Register 0
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
Address:
T0SEQ — Endpoint 0 Transmit Sequence Bit
TX0E — Endpoint 0 Transmit Enable
RX0E — Endpoint 0 Receive Enable
Reset:
Read:
Write:
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed at
endpoint 0. Toggling of this bit must be controlled by software. Reset
clears this bit.
This read/write bit enables a transmit to occur when the USB host
controller sends an IN token to endpoint 0. Software should set this
bit when data is ready to be transmitted. It must be cleared by
software when no more endpoint 0 data needs to be transmitted.
If this bit is 0 or the TXD0F is set, the USB will respond with a NAK
handshake to any endpoint 0 IN tokens. Reset clears this bit.
This read/write bit enables a receive to occur when the USB host
controller sends an OUT token to endpoint 0. Software should set this
bit when data is ready to be received. It must be cleared by software
when data cannot be received.
If this bit is 0 or the RXD0F is set, the USB will respond with a NAK
handshake to any endpoint 0 OUT tokens; but does not respond to a
SETUP token. Reset clears this bit.
1 = DATA1 token active for next endpoint 0 transmit
0 = DATA0 token active for next endpoint 0 transmit
1 = Data is ready to be sent
0 = Data is not ready. Respond with NAK
1 = Data is ready to be received
0 = Not ready for data. Respond with NAK
T0SEQ
$003B
Bit 7
Universal Serial Bus Module (USB)
0
Figure 9-19. USB Control Register 0 (UCR0)
6
0
0
TX0E
5
0
RX0E
4
0
TP0SIZ3
Universal Serial Bus Module (USB)
3
0
TP0SIZ2
2
0
TP0SIZ1
1
0
Technical Data
I/O Registers
TP0SIZ0
Bit 0
0
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