MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 60

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

FLASH Memory
4.8 FLASH Protection
4.8.1 FLASH Block Protect Register
Technical Data
60
NOTE:
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made to protect
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH block
protect register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends to the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
When the FLBPR is cleared (all 0’s), the entire FLASH memory is
protected from being programmed and erased. When all the bits are set,
the entire FLASH memory is accessible for program and erase.
The FLASH block protect register is implemented as an 8-bit I/O register.
The content of this register determine the starting location of the
protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Register Bit 7 to Bit 0
Reset:
Read:
Write:
Start address of FLASH block protect
BPR[7:1] represent bits [15:9] of a 16-bit memory address; bits [8:0]
are logic 0’s.
Figure 4-4. FLASH Block Protect Register (FLBPR)
$FE09
BPR7
Bit 7
0
Figure 4-5. FLASH Block Protect Start Address
BPR6
FLASH Memory
6
0
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
BPR5
5
0
BPR4
4
0
BPR[7:1]
BPR3
3
0
16-bit memory address
BPR2
Freescale Semiconductor
2
0
0 0 0 0 0 0 0 0 0
BPR1
1
0
BPR0
Bit 0
0