MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 213

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

12.7.1 Port E Data Register
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
NOTE:
Additional
Additional
Alternative
Function:
Function:
Function:
Address:
The port E data register contains a data latch for each of the five port E
pins.
PTE2 and PTE0 are not available in the 20-pin PDIP and 20-pin SOIC
packages.
PTE[4:0] — Port E Data Bits
Reset:
Read:
Write:
PTE[4:0] are read/write, software-programmable bits. Data direction
of each port E pin is under the control of the corresponding bit in data
direction register E.
The PTE4 and PTE3 pullup enable bits, PTE4P and PTE3P, in the
port option control register (POCR) enable 5kΩ pullups on PTE4 and
PTE3 if the respective pin is configured as an input and the USB
module is disabled. (See
The PTE[2:0] pullup enable bit, PTE20P, in the port option control
register (POCR) enables pullups on PTE2–PTE0, regardless of the
pin is configured as an input or an output. (See
$0008
Bit 7
0
Figure 12-14. Port E Data Register (PTE)
Input/Output Ports (I/O)
= Unimplemented
6
0
5
0
12.8 Port
Open-drain Open-drain
Optional
External
interrupt
Unaffected by reset
pullup
PTE4
D–
4
Options.)
Optional
pullup
PTE3
D+
3
Optional
TCH1
pullup
PTE2
12.8 Port
2
Input/Output Ports (I/O)
Optional
pullup
PTE1
TCH0
1
Technical Data
Options.)
Optional
pullup
TCLK
PTE0
Bit 0
Port E
213