MC68HC908JB8JPE Freescale Semiconductor, MC68HC908JB8JPE Datasheet - Page 204

• Manufacturer Part Number: MC68HC908JB8JPE
• Description: IC MCU FLASH 8BIT 8K 20-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB8JPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 3MHz
• No. Of Timers: 1
• Embedded Interface Type: USB
• Rohs Compliant: Yes
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Input/Output Ports (I/O)
12.4 Port B
12.4.1 Port B Data Register
Technical Data
204
NOTE:
Additional
Function:
Address:
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
Port B is an 8-bit general-purpose bidirectional I/O port with software
configurable pullups.
The port B data register contains a data latch for each of the eight port B
pins.
PTB7–PTB0 are not available in the 20-pin PDIP, 20-pin SOIC, and
28-pin SOIC packages.
NOTES:
Reset:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Read:
Write:
DDRA
Bit
0
1
Optional
$0001
pullup
PTB7
Bit 7
PTA Bit
Figure 12-5. Port B Data Register (PTB)
Input/Output Ports (I/O)
X
Optional
X
(1)
pullup
PTB6
6
Table 12-2. Port A Pin Functions
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
I/O Pin Mode
Input, Hi-Z
Optional
pullup
PTB5
Output
5
Optional
Unaffected by reset
(2)
pullup
PTB4
4
Read/Write
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
Optional
pullup
PTB3
3
Table 12-2
Optional
pullup
PTB2
PTA[7:0]
Freescale Semiconductor
2
Read
Accesses to PTA
Pin
Optional
pullup
PTB1
summarizes
1
PTA[7:0]
PTA[7:0]
Write
Optional
pullup
PTB0
Bit 0
(3)