M37544G2AGP#U0 Renesas Electronics America, M37544G2AGP#U0 Datasheet - Page 53

• Manufacturer Part Number: M37544G2AGP#U0
• Description: IC 740 MCU OTP 8K 32LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M37544G2AGP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: WDT
• Number Of I /o: 25
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: QzROM
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

REJ03B0108-0103
page 51 of 72
7544 Group (QzROM version)
Fig. 54 Selection of packages
(2) Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin as
short as possible. Especially, connect a capacitor across the
RESET pin and the V
(within 20 mm).
<Reason>
The width of a pulse input into the RESET pin is determined by the
timing necessary conditions. If noise having a shorter pulse width
than the standard is input to the RESET pin, the reset is released
before the internal state of the microcomputer is completely initial-
ized. This may cause a program runaway.
Fig. 55 Wiring for the RESET pin
NOTES ON USE
Countermeasures against noise
1. Shortest wiring length
(1) Package
Select the smallest possible package to make the total wiring
length short.
<Reason>
The wiring length depends on a microcomputer package. Use of a
small package, for example QFP and not DIP, makes the total wir-
ing length short to reduce influence of noise.
DIP
Reset
circuit
V
SS
SS
Rev.1.03
SDIP
pin with the shortest possible wiring
Reset
circuit
O.K.
N.G.
Noise
V
SS
Mar 31, 2009
SOP
RESET
V
RESET
V
SS
SS
QFP
(3) Wiring for clock input/output pins
• Make the length of wiring which is connected to clock I/O pins as
• Make the length of wiring (within 20 mm) across the grounding
• Separate the V
<Reason>
If noise enters clock I/O pins, clock waveforms may be deformed.
This may cause a program failure or program runaway. Also, if a
potential difference is caused by the noise between the V
of a microcomputer and the V
clock will not be input in the microcomputer.
Fig. 56 Wiring for clock I/O pins
(4) Wiring to CNV
Connect CNV
The GND pattern is required to be as close as possible to the
GND supplied to V
In order to improve the noise reduction, to connect a 5 kΩ resistor
serially to the CNV
As well as the above-mentioned, in this case, connect to a GND
pattern at the shortest distance. The GND pattern is required to be
as close as possible to the GND supplied to V
<Reason>
The CNV
the built-in QzROM. When programming in the built-in QzROM,
the impedance of the CNV
rent for writing flow into the QzROM. Because of this, noise can
enter easily. If noise enters the CNV
codes or data are read from the built-in QzROM, which may cause
a program runaway.
Fig. 57 Wiring for the CNV
short as possible.
lead of a capacitor which is connected to an oscillator and the
V
terns.
SS
pin of a microcomputer as short as possible.
SS
pin of the QzROM is the power source input pin for
SS
Note: This indicates pin.
N.G.
SS
Noise
pin to a GND pattern at the shortest distance.
SS
SS
SS
pattern only for oscillation from other V
pin
.
pin - GND line may be valid.
CNV
X
X
V
V
SS
SS
SS
SS
IN
OUT
SS
SS
(Note)
(Note)
pin is low to allow the electric cur-
pin of the QzROM
level of an oscillator, the correct
SS
The shortest
About 5kΩ
The shortest
pin, abnormal instruction
O.K.
SS
X
X
V
.
IN
OUT
SS
SS
SS
level
pat-