M30833FJFP#U3 Renesas Electronics America, M30833FJFP#U3 Datasheet - Page 276

• Manufacturer Part Number: M30833FJFP#U3
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
3
. v
J
2
Figure 21.3 Intelligent I/O Group 2 Block Diagram
0
1
C
9
3 .
B
8 /
0
1
Request from the communication function
IE
3
0
IN
3
J
/ISRxD2
G
ISCLK2
4
BT2S
BTS
a
f
1
0 -
n
o r
3 .
1
11
u
, 1
3
BCK1 to BCK0
p
1
Request from the group1
2
(
M
0
NOTES:
Digital
0
3
filter
1. In the 100-pin package, these pins are not connected to external pins.
2. Each register enters a reset state after the G2BCR0 register supplies the
3. See Figure 10.14.
6
2
clock.
C
Page 251
8 /
, 3
1
DIV4 to DIV0
Polarity
by 2(n+1)
inverse
selector
Divider
IPOL
Clock
DF
M
0
3
2
C
f o
f
Request by matching the base
timer with the G2PO0 register
detection
BT2
Start bit
8 /
4
counter
3
Group2 base
timer reset
8
Bit
) T
8
G2PO0 register
G2PO1 register
G2PO2 register
G2PO3 register
G2PO4 register
G2PO5 register
G2PO6 register
G2PO7 register
Base timer
Transmit register
Receive register
ACK calculation
G2TB register
ALL "F" detection
Transmit parity
Receive parity
Address detect
Byte counter
calculation
calculation
ID detection
function
Overflow of bit 15
in the base timer
Base timer interrupt request BT2R
Bit modulation
Bit modulation
Bit modulation
Bit modulation
Bit modulation
Bit modulation
Bit modulation
Bit modulation
Statement length
detect function
Output control
G2RB register
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
function
Transmit
DIV4 to DIV0, BCK1 to BCK0 : Bits in the G2BCR0 register
BTS : Bit in the G2BCR1 register
BT2S : Bit in the BTSR register
OPOL, IPOL : Bits in the G2CR register
DF : Bit in the IECR register
MOD2 to MOD0 : Bits in the G2POCRj register (j = 0 to 7)
latch
lost detection
Arbitration
interrupt control
IE, serial I/O
Polarity
inverse
OPOL
Real time port
output value
(3)
control
control
control
control
output
output
output
output
PWM
PWM
PWM
PWM
000 to 010,
100
000 to 010,
100
IE transmit interrupt request
IE receive interrupt request
Clock synchronous serial I/O
mode transmit interrupt request
Clock synchronous serial I/O
mode receive interrupt request
IE start bit interrupt request
MOD2 to MOD0
MOD2 to MOD0
PO2jR
111
Waveform generation
interrupt request
111
OUTC2
OUTC2
OUTC2
OUTC2
OUTC2
OUTC2
(3)
OUTC2
/ISTxD2/IE
OUTC2
/ISCLK2
2
3
4
5
6
7
21. Intelligent I/O
0
1
(IE0R to IE2R)
(IE0R to IE2R)
(IE0R to IE2R)
(Note 1)
OUT
(SIO2RR)
(SIO2TR)
(3)
(3)
(3)
(3)
(3)