M30833FJFP#U3 Renesas Electronics America, M30833FJFP#U3 Datasheet - Page 417

• Manufacturer Part Number: M30833FJFP#U3
• Description: IC M32C/83 MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30833FJFP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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25.2 Functions to Prevent the Flash Memory from Rewriting
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3
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2
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25.1.1 Boot Mode
The flash memory has the ROM code protect function for parallel I/O mode and the ID code verify function
for standard I/O mode to prevent the flash memory from reading or rewriting.
25.2.1 ROM Code Protect Function
25.2.2 ID Code Verify Function
1
9
C
3 .
B
The microcomputer enters boot mode when a hardware reset is performed while an "H" signal is applied
to the CNV
is executed.
In boot mode, the FMR05 bit in the FMR0 register selects access to either the boot ROM area or the user
ROM area.
The rewrite control program for standard serial I/O mode (refer to 25.4 Standard Serial I/O Mode) is
stored in the boot ROM area before shipment.
The boot ROM area can be rewritten in parallel I/O mode only. If any rewrite control program using erase-
write mode is written in the boot ROM area, the flash memory can be rewritten according to the system
implemented.
The ROM code protect function prevents the flash memory from reading and rewriting in parallel I/O
mode. Figure 25.2 shows the ROMCP register. The ROMCP register is located in the user ROM area.
The ROM code protect function is enabled when the ROMCP1 bit is set to "00
function is disabled when the ROMCR bit is set to "00
Therefore, set the ROMCR bit to "11
protect function.
Once the ROM code protect function is enabled, the ROMCR bit cannot be changed in parallel I/O mode.
Rewrite the ROMCR bit to "00
ROM code protect function.
Use the ID code verify function in standard serial I/O mode. The ID code sent from the serial programmer
is compared with the ID code written in the flash memory for a match. If the ID codes do not match,
commands sent from the serial programmer are not accepted. However, if the four bytes of the reset
vector are "FFFFFFFF
The ID codes are 7-byte data stored consecutively, starting with the first byte, into addresses
0FFFFDF
memory must have a program with the ID codes set in these addresses.
8 /
0
1
3
0
3
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4
a
0 -
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o r
3 .
1
u
, 1
3
p
1
16
2
SS
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, 0FFFFE3
0
0
3
and P5
6
2
C
8 /
Page 392
, 3
0
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pins and an "L" signal is applied to the P5
16
16
3
, 0FFFFEB
", ID codes are not compared, and all commands are accepted.
2
C
f o
8 /
4
3
8
2
) T
8
" in standard serial I/O mode or CPU rewrite mode when disabling the
16
, 0FFFFEF
2
" and the ROMCP1 bit to "00
16
, 0FFFFF3
2
", regardless of the ROMCP1 bit setting.
16
5
, 0FFFFF7
pin. The program in the boot ROM area
2
" when setting up the ROM code
16
and 0FFFFFB
2
". The ROM code protect
25. Flash Memory Version
16
. The flash