ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 147

IC AVR MCU 8K 8MHZ 3V 28DIP

ATMEGA8L-8PU

Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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2486O–AVR–10/04
Table 53. Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode
(U2X = 0)
Table 54. Recommended Maximum Receiver Baud Rate Error for Double Speed Mode
(U2X = 1)
The recommendations of the maximum Receiver baud rate error was made under the
assumption that the Receiver and Transmitter equally divides the maximum total error.
There are two possible sources for the Receivers Baud Rate error. The Receiver’s sys-
tem clock (XTAL) will always have some minor instability over the supply voltage range
and the temperature range. When using a crystal to generate the system clock, this is
rarely a problem, but for a resonator the system clock may differ more than 2% depend-
ing of the resonators tolerance. The second source for the error is more controllable.
The baud rate generator can not always do an exact division of the system frequency to
get the baud rate wanted. In this case an UBRR value that gives an acceptable low error
can be used if possible.
(Data+Parity Bit)
(Data+Parity Bit)
D#
10
D#
10
5
6
7
8
9
5
6
7
8
9
R
R
94,12
94,92
95,52
96,00
96,39
96,70
slow
93,20
94,12
94,81
95,36
95,81
96,17
slow
(%)
(%)
R
105,66
104,92
104,35
103,90
103,53
103,23
R
106,67
105,79
105,11
104,58
104,14
103,78
fast
fast
(%)
(%)
+5.66/-5.88
+4.92/-5.08
+4.35/-4.48
+3.90/-4.00
+3.53/-3.61
+3.23/-3.30
Max Total
+5.79/-5.88
+5.11/-5.19
+4.58/-4.54
+4.14/-4.19
+3.78/-3.83
Error (%)
Max Total
+6.67/-6.8
Error (%)
Recommended Max
Recommended Max
Receiver Error (%)
ATmega8(L)
Receiver Error (%)
± 2.5
± 2.0
± 1.5
± 1.5
± 1.5
± 1.0
± 3.0
± 2.0
± 2.0
± 2.0
± 1.5
± 1.5
147

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