ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 243

IC AVR MCU 8K 8MHZ 3V 28DIP

ATMEGA8L-8PU

Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SPI Timing
Characteristics
2486O–AVR–10/04
Figure 115. Two-wire Serial Bus Timing
See Figure 116 and Figure 117 for details.
Table 102. SPI Timing Parameters
Note:
SCL
SDA
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
t
SU;STA
5. This requirement applies to all ATmega8 Two-wire Serial Interface operation. Other
6. The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega8 Two-wire Serial Interface is (1/f
1. In SPI Programming mode the minimum SCK high/low period is:
SS high to tri-state
devices connected to the Two-wire Serial Bus need only obey the general f
requirement.
2/f
met at f
2/f
f
speed (400 kHz) with other ATmega8 devices, as well as any other device with a
proper t
SCK to out high
- 2t
- 3t
SCK high/low
SCK to SS high
SS low to SCK
CK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
SCK period
Out to SCK
CK
CK
SCK to out
SCK to out
CLCL
CLCL
= 8 MHz. Still, ATmega8 devices connected to the bus may communicate at full
), thus f
), thus the low time requirement will not be strictly met for f
Setup
Setup
Hold
Hold
SCL
LOW
for f
for f
= 100 kHz.
acceptance margin.
CK
CK
t
CK
HD;STA
(1)
< 12 MHz
> 12 MHz
must be greater than 6 MHz for the low time requirement to be strictly
t
t
of
LOW
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Salve
t
HIGH
t
HD;DAT
t
4 • t
2 • t
2 • t
LOW
Min
10
10
20
ck
ck
ck
t
SU;DAT
50% duty cycle
See Table 50
0.5 • t
Typ
3.6
10
10
10
10
15
15
10
SCK
ATmega8(L)
SCL
t
SU;STO
> 308 kHz when
t
Max
1.6
r
ns
t
BUF
SCL
SCL
243
SCL
-
-

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