ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 150
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ATMEGA8L-8PU
Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA8L-8MU.pdf
(25 pages)
2.ATMEGA8L-8MU.pdf
(302 pages)
3.ATMEGA8-16PU.pdf
(305 pages)
Specifications of ATMEGA8L-8PU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
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Quantity:
101
Company:
Part Number:
ATMEGA8L-8PU
Manufacturer:
ATMEL
Quantity:
33 600
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Part Number:
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Read Access
USART Register
Description
USART I/O Data Register –
UDR
150
ATmega8(L)
Doing a read access to the UBRRH or the UCSRC Register is a more complex opera-
tion. However, in most applications, it is rarely necessary to read any of these registers.
The read access is controlled by a timed sequence. Reading the I/O location once
returns the UBRRH Register contents. If the register location was read in previous sys-
tem clock cycle, reading the register in the current clock cycle will return the UCSRC
contents. Note that the timed sequence for reading the UCSRC is an atomic operation.
Interrupts must therefore be controlled (e.g., by disabling interrupts globally) during the
read operation.
The following code example shows how to read the UCSRC Register contents.
Note:
The assembly code example returns the UCSRC value in r16.
Reading the UBRRH contents is not an atomic operation and therefore it can be read as
an ordinary register, as long as the previous instruction did not access the register
location.
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers
share the same I/O address referred to as USART Data Register or UDR. The Transmit
Data Buffer Register (TXB) will be the destination for data written to the UDR Register
location. Reading the UDR Register location will return the contents of the Receive Data
Buffer Register (RXB).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter
and set to zero by the Receiver.
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
USART_ReadUCSRC:
unsigned char USART_ReadUCSRC( void )
{
}
; Read UCSRC
in r16,UBRRH
in r16,UCSRC
ret
unsigned char ucsrc;
/* Read UCSRC */
ucsrc = UBRRH;
ucsrc = UCSRC;
return ucsrc;
1. The example code assumes that the part specific header file is included.
R/W
7
0
(1)
R/W
6
0
(1)
R/W
5
0
R/W
4
0
RXB[7:0]
TXB[7:0]
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
2486O–AVR–10/04
UDR (Read)
UDR (Write)