ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 225

IC AVR MCU 8K 8MHZ 3V 28DIP

ATMEGA8L-8PU

Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Parallel Programming
Enter Programming Mode
Considerations for Efficient
Programming
Chip Erase
2486O–AVR–10/04
The following algorithm puts the device in Parallel Programming mode:
1. Apply 4.5 - 5.5V between V
2. Set RESET to “0” and toggle XTAL1 at least 6 times
3. Set the Prog_enable pins listed in Table 92 on page 224 to “0000” and wait at
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns
Note, if the RESET pin is disabled by programming the RSTDISBL Fuse, it may not be
possible to follow the proposed algorithm above. The same may apply when External
Crystal or External RC configuration is selected because it is not possible to apply qual-
ified XTAL1 pulses. In such cases, the following algorithm should be followed:
1. Set Prog_enable pins listed in Table 92 on page 224 to “0000”.
2. Apply 4.5 - 5.5V between V
3. Wait 100 ns.
4. Re-program the fuses to ensure that External Clock is selected as clock source
5. Exit Programming mode by power the device down or by bringing RESET pin to
6. Entering Programming mode with the original algorithm, as described above.
The loaded command and address are retained in the device during programming. For
efficient programming, the following should be considered.
The Chip Erase will erase the Flash and EEPROM
Bits are not reset until the Program memory has been completely erased. The Fuse Bits
are not changed. A Chip Erase must be performed before the Flash and/or the
EEPROM are reprogrammed.
Note:
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for Chip Erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.
least 100 ns.
after +12V has been applied to RESET, will cause the device to fail entering Pro-
gramming mode.
applied to RESET.
(CKSEL3:0 = 0’b0000) and RESET pin is activated (RSTDISBL unprogrammed).
If Lock Bits are programmed, a chip erase command must be executed before
changing the fuses.
0’b0.
The command needs only be loaded once when writing or reading multiple memory
locations.
Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless
the EESAVE Fuse is programmed) and Flash after a Chip Erase.
Address High byte needs only be loaded before programming or reading a new 256
word window in Flash or 256 byte EEPROM. This consideration also applies to
Signature bytes reading.
1. The EEPRPOM memory is preserved during chip erase if the EESAVE Fuse is
programmed.
CC
CC
and GND, and wait at least 100 µs.
and GND simultaneously as 11.5 - 12.5V is
(1)
memories plus Lock Bits. The Lock
ATmega8(L)
225

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