ATMEGA8L-8PU Atmel, ATMEGA8L-8PU Datasheet - Page 206
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ATMEGA8L-8PU
Manufacturer Part Number
ATMEGA8L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA8L-8MU.pdf
(25 pages)
2.ATMEGA8L-8MU.pdf
(302 pages)
3.ATMEGA8-16PU.pdf
(305 pages)
Specifications of ATMEGA8L-8PU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8L-8PU
Manufacturer:
BROADCOM
Quantity:
101
Company:
Part Number:
ATMEGA8L-8PU
Manufacturer:
ATMEL
Quantity:
33 600
Part Number:
ATMEGA8L-8PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA8L-8PU-QS096
Manufacturer:
ATMEL
Quantity:
56
Boot Loader Support
– Read-While-Write
Self-Programming
Boot Loader Features
Application and Boot
Loader Flash Sections
Application Section
BLS – Boot Loader Section
Read-While-Write and No
Read-While-Write Flash
Sections
206
ATmega8(L)
The Boot Loader Support provides a real Read-While-Write Self-Programming mecha-
nism for downloading and uploading program code by the MCU itself. This feature
allows flexible application software updates controlled by the MCU using a Flash-resi-
dent Boot Loader program. The Boot Loader program can use any available data
interface and associated protocol to read code and write (program) that code into the
Flash memory, or read the code from the Program memory. The program code within
the Boot Loader section has the capability to write into the entire Flash, including the
Boot Loader Memory. The Boot Loader can thus even modify itself, and it can also
erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader Memory is configurable with fuses and the Boot Loader has two separate sets of
Boot Lock Bits which can be set independently. This gives the user a unique flexibility to
select different levels of protection.
•
•
•
•
•
•
•
Note:
The Flash memory is organized in two main sections, the Application section and the
Boot loader section (see Figure 102). The size of the different sections is configured by
the BOOTSZ Fuses as shown in Table 82 on page 217 and Figure 102. These two sec-
tions can have different level of protection since they have different sets of Lock Bits.
The application section is the section of the Flash that is used for storing the application
code. The protection level for the application section can be selected by the application
boot Lock Bits (Boot Lock Bits 0), see Table 78 on page 209. The application section
can never store any Boot Loader code since the SPM instruction is disabled when exe-
cuted from the application section.
While the application section is used for storing the application code, the The Boot
Loader software must be located in the BLS since the SPM instruction can initiate a pro-
gramming when executing from the BLS only. The SPM instruction can access the
entire Flash, including the BLS itself. The protection level for the Boot Loader section
can be selected by the Boot Loader Lock Bits (Boot Lock Bits 1), see Table 79 on page
209.
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot
Loader software update is dependent on which address that is being programmed. In
addition to the two sections that are configurable by the BOOTSZ Fuses as described
above, the Flash is also divided into two fixed sections, the Read-While-Write (RWW)
section and the No Read-While-Write (NRWW) section. The limit between the RWW-
and NRWW sections is given in Table 83 on page 218 and Figure 102 on page 208. The
main difference between the two sections is:
•
•
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
When erasing or writing a page located inside the RWW section, the NRWW section
can be read during the operation.
When erasing or writing a page located inside the NRWW section, the CPU is halted
during the entire operation.
1. A page is a section in the Flash consisting of several bytes (see Table 89 on page
222
operation.
)
used during programming. The page organization does not affect normal
(1)
Size
2486O–AVR–10/04