F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 133

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F272-BAG-T-TR

Manufacturer Part Number
F272-BAG-T-TR
Description
MCU 16BIT 256K FLASH 144-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of F272-BAG-T-TR

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-TQFP, 144-VQFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
ASC, CAN, I2C, SSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
F272-BAG-T-TR
Manufacturer:
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Quantity:
10 000
Part Number:
F272-BAG-T-TR
Manufacturer:
ST
0
ST10F272B/ST10F272E
Table 63.
1. Not 100% tested, guaranteed by design characterization.
2. This specification is not valid for outputs which are switched to open drain mode. In this case the respective output will float
3. Port 5 leakage values are granted for not selected A/D Converter channel. One channels is always selected (by default,
4. The leakage of P2.0 is higher than other pins due to the additional logic (pass gates active only in specific test modes)
5. Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin exceeds the
6. This specification is only valid during Reset, or during Hold- or Adapt-mode. Port 6 pins are only affected, if they are used
7. The maximum current may be drawn while the respective signal line remains inactive.
8. The minimum current must be drawn in order to drive the respective signal line active.
9. The power supply current is a function of the operating frequency (f
Power Down supply current
(RTC off, Oscillators off,
Main Voltage Regulator off)
Power Down supply current
(RTC on, Main Oscillator on,
Main Voltage Regulator off)
Power Down supply current
(RTC on, 32kHz Oscillator on,
Main Voltage Regulator off)
Stand-by supply current
(RTC off, Oscillators off, V
on)
Stand-by supply current
(RTC on, 32kHz Oscillator on,
main V
Stand-by supply current
(V
DD
and the voltage is imposed by the external circuitry.
after reset, P5.0 is selected). For the selected channel the leakage value is similar to that of other port pins.
implemented on input path. Pay attention to not stress P2.0 input pin with negative overload beyond the specified limits:
failures in Flash reading may occur (sense amplifier perturbation). Refer to next
circuitry.
specified range (i.e. V
not exceed 50mA. The supply voltage must remain within the specified limits.
for CS output and the open drain function is not enabled.
illustrated in the Figure 38 below. This parameter is tested at V
disconnected and all inputs at V
doing the following:
Fetching code from IRAM and XRAM1, accessing in read and write to both XRAM modules
Watchdog Timer is enabled and regularly serviced
RTC is running with main oscillator clock as reference, generating a tick interrupts every 192 clock cycles
Four channel of XPWM are running (waves period: 2, 2.5, 3 and 4 CPU clock cycles): no output toggling
Five General Purpose Timers are running in timer mode with prescaler equal to 8 (T2, T3, T4, T5, T6)
ADC is in Auto Scan Continuous Conversion mode on all 16 channels of Port5
All interrupts generated by XPWM, RTC, Timers and ADC are not serviced
transient condition)
DD
off, V
DC characteristics (continued)
Parameter
STBY
on)
OV
(12)
(12)
(1) (12)
> V
DD
(12)
(12)
(12)
DD
off, V
+ 0.3 V or V
IL
or V
STBY
IH
, RSTIN pin at V
OV
I
I
I
I
I
I
PD1
PD2
PD3
SB1
SB2
SB3
< –0.3 V). The absolute sum of input overload currents on all port pins may
Symbol
IH1min
DDmax
: this implies I/O current is not considered. The device is
min.
Limit values
CPU
and at maximum CPU clock frequency with all outputs
is expressed in MHz). This dependency is
Typical
Value
max.
200
400
200
120
500
120
500
Figure 37
2.5
for a scheme of the input
Unit
mA
Electrical characteristics
µA
µA
µA
µA
µA
µA
µA
T
T
Test Condition
T
T
V
V
V
V
A
A
A
A
STBY
STBY
STBY
STBY
T
T
T
= T
= T
= T
= T
A
A
A
= 25°C
= 25°C
= 25°C
J
J
J
J
= 5.5 V
= 5.5 V
= 5.5 V
= 5.5 V
= 125°C
= 125°C
= 25°C
= 25°C
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