F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 136

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F272-BAG-T-TR

Manufacturer Part Number
F272-BAG-T-TR
Description
MCU 16BIT 256K FLASH 144-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of F272-BAG-T-TR

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-TQFP, 144-VQFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
ASC, CAN, I2C, SSC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
F272-BAG-T-TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
F272-BAG-T-TR
Manufacturer:
ST
0
Electrical characteristics
24.6
Table 64.
1. The figures are given after about 100 cycles due to testing routines (0 cycles at the final customer).
2. Word and Double Word Programming times are provided as average values derived from a full sector programming time:
3. Bank Erase is obtained through a multiple Sector Erase operation (setting bits related to all sectors of the Bank). As
4. Not 100% tested, guaranteed by Design Characterization.
136/182
Word Program (32-bit)
Double Word Program (64-bit)
Bank 0 Program (256K)
(Double Word Program)
Sector Erase (8K)
Sector Erase (32K)
Sector Erase (64K)
Bank 0 Erase (256K)
Recovery from Power-Down (t
Program Suspend Latency
Erase Suspend Latency
Erase Suspend Request Rate
Set Protection
absolute value of a Word or Double Word Programming time could be longer than the average value.
ST10F272 implements only one bank, the Bank Erase operation is equivalent to Module and Chip Erase operations.
Parameter
Flash characteristics
V
Flash characteristics
(4)
DD
= 5 V ± 10%, V
(3)
(2)
(4)
(4)
(2))
PD
(4)
)
SS
0 cycles
T
= 0 V
Typical
A
= 25°C
1.6
0.6
0.5
1.1
0.8
1.7
1.3
5.6
4.0
35
60
20
40
(1)
0 cycles
13.6
11.9
150
2.0
0.9
0.8
2.0
1.8
3.7
3.3
80
40
10
30
20
90
T
Maximum
A
(1)
= 125°C
100k cycles
19.2
17.5
290
570
300
3.9
1.0
0.9
2.7
2.5
5.1
4.7
20
40
10
30
Unit
ms
µs
µs
µs
µs
µs
µs
s
s
s
s
s
not preprogrammed
preprogrammed
not preprogrammed
preprogrammed
not preprogrammed
preprogrammed
not preprogrammed
preprogrammed
(4)
Min delay between 2
requests
ST10F272B/ST10F272E
Notes

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