F272-BAG-T-TR STMicroelectronics, F272-BAG-T-TR Datasheet - Page 91

• Manufacturer Part Number: F272-BAG-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAG-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

ST10F272B/ST10F272E
Figure 22. Synchronous short / long hardware RESET (EA = 0)
RSTIN
RSTF
(After Filter)
P0[15:13]
P0[12:2]
P0[1:0]
ALE
RST
RSTOUT
RPD
Notes:
1. RSTIN assertion can be released there. Refer also to Section 21.1 for details on minimum pulse duration.
2. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for 5V operation)
3. 3 to 8 TCL depending on clock source selection.
4. RSTIN pin is pulled low if bit BDRSTEN (bit 3 of SYSCON register) was previously set by software.
5. Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked by the
the asynchronous reset is then immediately entered.
Bit BDRSTEN is cleared after reset.
internal filter (refer to Section 21.1).
≤ 500 ns
≥ 50 ns
≤ 4 TCL5)
200mA Discharge
1)
≤ 12 TCL
not t.
≤ 500 ns
≥ 50 ns
4)
< 1032 TCL
1024 TCL
not transparent
not transparent
transparent
≤ 500 ns
≥ 50 ns
8 TCL
2) VRPD > 2.5V Asynchronous Reset not entered
At this time RSTF is sampled HIGH or LOW
so it is SHORT or LONG reset
3..8 TCL3)
not t.
not t.
8 TCL
System reset
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