MC9S08DZ128MLL Freescale Semiconductor, MC9S08DZ128MLL Datasheet - Page 296

MCU 8BIT 128K FLASH 100-LQFP

MC9S08DZ128MLL

Manufacturer Part Number
MC9S08DZ128MLL
Description
MCU 8BIT 128K FLASH 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r

Specifications of MC9S08DZ128MLL

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
88
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Controller Family/series
HCS08
No. Of I/o's
87
Eeprom Memory Size
2KB
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
3
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08DZ128MLL
Manufacturer:
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Part Number:
MC9S08DZ128MLL
Manufacturer:
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Quantity:
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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
12.5.4.3
In all emulation modes, the MSCAN module behaves just like normal system operation modes as
described within this specification.
12.5.4.4
In an optional CAN bus monitoring mode (listen-only), the CAN node is able to receive valid data frames
and valid remote frames, but it sends only “recessive” bits on the CAN bus. In addition, it cannot start a
transmision. If the MAC sub-layer is required to send a “dominant” bit (ACK bit, overload flag, or active
error flag), the bit is rerouted internally so that the MAC sub-layer monitors this “dominant” bit, although
the CAN bus may remain in recessive state externally.
12.5.4.5
The MSCAN module has no security features.
12.5.4.6
Loopback self test mode is sometimes used to check software, independent of connections in the external
system, to help isolate system problems. In this mode, the transmitter output is internally connected to the
receiver input. The RXCAN input pin is ignored and the TXCAN output goes to the recessive state (logic
1). The MSCAN behaves as it does normally when transmitting and treats its own transmitted message as
a message received from a remote node. In this state, the MSCAN ignores the bit sent during the ACK slot
in the CAN frame acknowledge field to ensure proper reception of its own message. Both transmit and
receive interrupts are generated.
12.5.5
If the MSCAN is disabled (CANE = 0), the MSCAN clocks are stopped for power saving.
If the MSCAN is enabled (CANE = 1), the MSCAN has two additional modes with reduced power
consumption, compared to normal mode: sleep and power down mode. In sleep mode, power consumption
is reduced by stopping all clocks except those to access the registers from the CPU side. In power down
mode, all clocks are stopped and no power is consumed.
Table 12-36
modes is entered by the given settings on the CSWAI and SLPRQ/SLPAK bits.
For all modes, an MSCAN wake-up interrupt can occur only if the MSCAN is in sleep mode (SLPRQ = 1
and SLPAK = 1), wake-up functionality is enabled (WUPE = 1), and the wake-up interrupt is enabled
(WUPIE = 1).
296
Low-Power Options
summarizes the combinations of MSCAN and CPU modes. A particular combination of
Emulation Modes
Listen-Only Mode
Security Modes
Loopback Self Test Mode
MC9S08DZ128 Series Data Sheet, Rev. 1
Freescale Semiconductor

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