MC9S08DZ128MLL Freescale Semiconductor, MC9S08DZ128MLL Datasheet - Page 43

MCU 8BIT 128K FLASH 100-LQFP

MC9S08DZ128MLL

Manufacturer Part Number
MC9S08DZ128MLL
Description
MCU 8BIT 128K FLASH 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r

Specifications of MC9S08DZ128MLL

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
88
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Controller Family/series
HCS08
No. Of I/o's
87
Eeprom Memory Size
2KB
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
3
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08DZ128MLL
Manufacturer:
FREESCAL
Quantity:
300
Part Number:
MC9S08DZ128MLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
clocks to the peripheral systems are halted to reduce power consumption. Refer to
Mode
Freescale Semiconductor
” and
Section 3.6.1, “Stop3
1
2
3
4
5
6
CPU
RAM
FLASH/EEPROM
Parallel Port Registers
ACMP
ADC
IIC
MCG
MSCAN
RTC
SCI
SPI
TPM
Voltage Regulator
XOSC
I/O Pins
Requires the LVD to be enabled, else in standby.
Requires the asynchronous ADC clock and LVD to be enabled, else in standby.
IRCLKEN and IREFSTEN set in MCGC1, else in standby.
Requires the RTC to be enabled, else in standby.
Requires the LVD or BDC to be enabled.
ERCLKEN and EREFSTEN set in MCGC2 for, else in standby. For high frequency
range (RANGE in MCGC2 set) requires the LVD to also be enabled in stop3.
Peripheral
Mode” for specific information on system behavior in stop modes.
MC9S08DZ128 Series Data Sheet, Rev. 1
Table 3-2. Stop Mode Behavior
Optionally On
Optionally On
States Held
Standby
Stop2
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
4
5
Mode
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
Optionally On
States Held
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Standby
Stop3
Chapter 3 Modes of Operation
1
2
3
4
5
6
Section 3.6.1, “Stop3
43

Related parts for MC9S08DZ128MLL