D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 987

• Manufacturer Part Number: D12312SVTEBL25
• Description: IC H8S MCU ROMLESS 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTEBL25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTEBL25; HD6412312SVTEBL25

Module
TPU1
TPU2
TPU3
TPU4
Register
Timer I/O control register 1
Timer interrupt enable register 1
Timer status register 1
Timer counter 1
Timer general register 1A
Timer general register 1B
Timer control register 2
Timer mode register 2
Timer I/O control register 2
Timer interrupt enable register 2
Timer status register 2
Timer counter 2
Timer general register 2A
Timer general register 2B
Timer control register 3
Timer mode register 3
Timer I/O control register 3H
Timer I/O control register 3L
Timer interrupt enable register 3
Timer status register 3
Timer counter 3
Timer general register 3A
Timer general register 3B
Timer general register 3C
Timer general register 3D
Timer control register 4
Timer mode register 4
Timer I/O control register 4
Timer interrupt enable register 4
Timer status register 4
Timer counter 4
Timer general register 4A
Timer general register 4B
TIOR1
TIER1
TSR1
TGR1A
TGR1B
TCR2
TMDR2
TIOR2
TIER2
TSR2
TGR2A
TGR2B
TCR3
TMDR3
TIER3
TSR3
TGR3A
TGR3B
TGR3C
TGR3D
TCR4
TMDR4
TIOR4
TIER4
TSR4
TGR4A
TGR4B
Abbreviation R/W
TCNT1
TCNT2
TIOR3H
TIOR3L
TCNT3
TCNT4
Rev.7.00 Feb. 14, 2007 page 953 of 1108
Appendix B Internal I/O Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/(W) *
R/W
R/W
R/(W) *
R/W
R/W
R/W
R/W
R/W
R/W
R/(W) *
R/W
R/W
R/W
R/W
R/W
R/(W) *
R/W
2
2
2
2
H'FFFF
H'FFFF
H'C0
H'00
H'40
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
Initial Value Address *
H'00
H'40
H'C0
H'0000
H'00
H'C0
H'0000
H'00
H'C0
H'00
H'00
H'40
H'C0
H'0000
H'00
H'C0
H'00
H'40
H'C0
H'0000
REJ09B0089-0700
H'FFE2
H'FFE4
H'FFE6
H'FFE8
H'FFEA
H'FFF0
H'FFF1
H'FFF2
H'FFF4
H'FFF6
H'FFF8
H'FFFA
H'FE80
H'FE81
H'FE82
H'FE83
H'FE84
H'FE86
H'FE88
H'FE8A
H'FE8C
H'FE8E
H'FE90
H'FE91
H'FE92
H'FE94
H'FE96
H'FE98
H'FE9A
H'FFE5
H'FFF5
H'FE85
H'FE95
1