MC9S12C32CFAE16 Freescale Semiconductor, MC9S12C32CFAE16 Datasheet - Page 257

• Manufacturer Part Number: MC9S12C32CFAE16
• Description: IC MCU 32K FLASH 16MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32CFAE16

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 16MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 31
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: HCS12
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 31
• Number Of Timers: 8
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

9.3.2.2
The REFDV register provides a finer granularity for the PLL multiplier steps. The count in the reference
divider divides OSCCLK frequency by REFDV + 1.
Read: anytime
Write: anytime except when PLLSEL = 1
9.3.2.3
This register is reserved for factory testing of the CRGV4 module and is not available in normal modes.
Read: always reads 0x0000 in normal modes
Write: unimplemented in normal modes
Freescale Semiconductor
Module Base + 0x0001
Module Base + 0x0002
Reset
Reset
W
W
R
R
CRG Reference Divider Register (REFDV)
Reserved Register (CTFLG)
0
0
0
0
7
7
Write to this register initializes the lock detector bit and the track detector
bit.
Writing to this register when in special mode can alter the CRGV4
functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 9-5. CRG Reference Divider Register (REFDV)
Figure 9-6. CRG Reserved Register (CTFLG)
MC9S12C-Family / MC9S12GC-Family
0
0
0
0
5
5
Rev 01.24
NOTE
NOTE
0
0
0
0
4
4
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
REFDV3
0
0
0
3
3
REFDV2
0
0
0
2
2
REFDV1
0
0
0
1
1
REFDV0
0
0
0
0
0
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