MC9S12C32CFAE16 Freescale Semiconductor, MC9S12C32CFAE16 Datasheet - Page 465

IC MCU 32K FLASH 16MHZ 48-LQFP

MC9S12C32CFAE16

Manufacturer Part Number
MC9S12C32CFAE16
Description
IC MCU 32K FLASH 16MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE16

Core Processor
HCS12
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
16MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
31
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
HCS12
Maximum Speed
16 MHz
Operating Supply Voltage
2.5|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
31
Number Of Timers
8
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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16.2
Due to the nature of VREG3V3V2 being a voltage regulator providing the chip internal power supply
voltages most signals are power supply signals connected to pads.
Table 16-1
16.2.1
Signal V
through this pin. A chip external decoupling capacitor (100 nF...220 nF, X7R ceramic) between V
V
For entering Shutdown Mode, pin V
16.2.2
Signals V
regulator. Internal precision reference circuits are supplied from these signals. A chip external decoupling
capacitor (100 nF...220 nF, X7R ceramic) between V
supply.
Freescale Semiconductor
SSR
V
REGEN
can smoothen ripple on V
V
V
Name
DDR
V
V
V
DDPLL
V
SSPLL
External Signal Description
V
DDA
DDR
DDA
SSA
DD
SS
(optional)
shows all signals of VREG3V3V2 associated with pins.
V
V
is the power input of VREG3V3V2. All currents sourced into the regulator loads flow
DDR
DDA
/V
Check device overview chapter for connectivity of the signals.
SSA
, V
— Regulator Power Input
which are supposed to be relatively quiet are used to supply the analog parts of the
SSA
Port
— Regulator Reference Supply
Table 16-1. VREG3V3V2 — Signal Properties
DDR
VREG3V3V2 power input (positive supply)
VREG3V3V2 quiet input (positive supply)
VREG3V3V2 quiet input (ground)
VREG3V3V2 primary output (positive supply)
VREG3V3V2 primary output (ground)
VREG3V3V2 secondary output (positive supply)
VREG3V3V2 secondary output (ground)
VREG3V3V2 (Optional) Regulator Enable
.
DDR
MC9S12C-Family / MC9S12GC-Family
should also be tied to ground on devices without a V
Chapter 16 Dual Output Voltage Regulator (VREG3V3V2) Block Description
Rev 01.24
NOTE
Function
DDA
and V
SSA
can further improve the quality of this
Reset State
REGEN
DDR
Pull Up
and
pin.
465

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