MC9S12C32CFAE16 Freescale Semiconductor, MC9S12C32CFAE16 Datasheet - Page 95

IC MCU 32K FLASH 16MHZ 48-LQFP

MC9S12C32CFAE16

Manufacturer Part Number
MC9S12C32CFAE16
Description
IC MCU 32K FLASH 16MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE16

Core Processor
HCS12
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
16MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
31
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
HCS12
Maximum Speed
16 MHz
Operating Supply Voltage
2.5|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
31
Number Of Timers
8
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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2.3.2.4.5
Read: Anytime.
Write: Anytime.
2.3.2.4.6
Read: Anytime.
Write: Anytime.
Freescale Semiconductor
Module Base + 0x001C
Module Base + 0x001D
PERP[7:0]
PPSP[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PERP7
PPSP7
Pull Device Enable Port P — This register configures whether a pull-up or a pull-down device is activated, if the
port is used as input. This bit has no effect if the port is used as output. Out of reset no pull device is enabled.
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
Pull Select Port P — This register serves a dual purpose by selecting the polarity of the active interrupt edge
as well as selecting a pull-up or pull-down device if enabled.
0 Falling edge on the associated port P pin sets the associated flag bit in the PIFP register.A pull-up device is
1 Rising edge on the associated port P pin sets the associated flag bit in the PIFP register.A pull-down device
0
0
7
7
connected to the associated port P pin, if enabled by the associated bit in register PERP and if the port is used
as input.
is connected to the associated port P pin, if enabled by the associated bit in register PERP and if the port is
used as input.
Port P Pull Device Enable Register (PERP)
Port P Polarity Select Register (PPSP)
PERP6
PPSP6
Figure 2-28. Port P Pull Device Enable Register (PERP)
0
0
6
6
Figure 2-29. Port P Polarity Select Register (PPSP)
Table 2-24. PERP Field Descriptions
Table 2-25. PPSP Field Descriptions
PERP5
PPSP5
MC9S12C-Family / MC9S12GC-Family
0
0
5
5
PERP4
PPSP4
Rev 01.24
0
0
4
4
Description
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
PERP3
PPSP3
0
0
3
3
PERP2
PPSP2
0
0
2
2
PERP1
PPSP1
0
0
1
1
PERP0
PPSP0
0
0
0
0
95

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