MC9S12C32CFAE16 Freescale Semiconductor, MC9S12C32CFAE16 Datasheet - Page 328

IC MCU 32K FLASH 16MHZ 48-LQFP

MC9S12C32CFAE16

Manufacturer Part Number
MC9S12C32CFAE16
Description
IC MCU 32K FLASH 16MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE16

Core Processor
HCS12
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
16MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
31
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
HCS12
Maximum Speed
16 MHz
Operating Supply Voltage
2.5|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
31
Number Of Timers
8
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
328
Extended Identifier
Standard Identifier
CAN 2.0A/B
CAN 2.0B
— a) the 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— b) the 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
filter bank (CANIDAR0–CANIDAR3, CANIDMR0–CANIDMR3) produces filter 0 to 3 hits.
Similarly, the second filter bank (CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7)
produces filter 4 to 7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
messages or
Figure 10-40
CANIDMR0–3CANIDMR) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
CANIDMR0
CANIDAR0
IDR0
IDR0
Figure 10-39. 32-bit Maskable Identifier Acceptance Filter
shows how the first 32-bit filter bank (CANIDAR0–CANIDA3,
AM0
ID21
AC0
ID3
MC9S12C-Family / MC9S12GC-Family
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
Rev 01.24
ID Accepted (Filter 0 Hit)
IDE
AM0
ID15
AC0
AM7
AC7
ID14
ID10
Figure 10-41
CANIDMR2
CANIDAR2
IDR2
IDR2
shows how the first 32-bit
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
Freescale Semiconductor
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
AC0
RTR
ID3

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