DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 279

MCU 3/5V 32K J-TEMP PB-FREE 64-L

DF36054GFPJV

Manufacturer Part Number
DF36054GFPJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054GFPJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
The watchdog timer is an 8-bit timer that can generate an internal reset signal for this LSI if a
system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.
The block diagram of the watchdog timer is shown in figure 13.1.
13.1
[Legend]
WDT: Watchdog timer
SBT: Subtimer
Selectable from nine counter input clocks.
Eight internal clock sources ( /64, /128, /256, /512, /1024, /2048, /4096, and /8192)
or the internal oscillator (WDT and SBT) can be selected as the timer-counter clock. When the
internal oscillator is selected, it can operate as the watchdog timer in any operating mode.
Reset signal generated on counter overflow
An overflow period of 1 to 256 times the selected clock can be set.
Features
[Legend]
TCSRWD: Timer control/status register WD
TCWD:
PSS:
TMWD:
oscillator
Internal
From subtimer
Timer counter WD
Prescaler S
Timer mode register WD
Figure 13.1 Block Diagram of Watchdog Timer
Section 13 Watchdog Timer
CLK
PSS
w(fw)
TCSRWD
TCWD
TMWD
Rev. 4.00 Mar. 15, 2006 Page 245 of 556
Section 13 Watchdog Timer
Internal reset
signal
REJ09B0026-0400

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