DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 97

MCU 3/5V 32K J-TEMP PB-FREE 64-L

DF36054GFPJV

Manufacturer Part Number
DF36054GFPJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054GFPJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
3.4.4
Table 3.2 shows the number of wait states after an interrupt request flag is set until the first
instruction of the interrupt handling-routine is executed.
Table 3.2
Note:
Item
Waiting time for completion of executing instruction*
Saving of PC and CCR to stack
Vector fetch
Instruction fetch
Internal processing
*
SP – 4
SP – 3
SP – 2
SP – 1
SP (R7)
[Legend]
PC H :
PC L :
CCR:
SP:
Notes:
Interrupt Response Time
Not including EEPMOV instruction.
Interrupt Wait States
Upper 8 bits of program counter (PC)
Lower 8 bits of program counter (PC)
Condition code register
Stack pointer
2.
3. Ignored when returning from the interrupt handling routine.
1.
Register contents must always be saved and restored by word length, starting from
an even-numbered address.
PC shows the address of the first instruction to be executed upon return from the interrupt
handling routine.
Prior to start of interrupt
exception handling
Figure 3.2 Stack Status after Exception Handling
Stack area
saved to stack
PC and CCR
SP (R7)
SP + 1
SP + 2
SP + 3
SP + 4
After completion of interrupt
States
1 to 23
4
2
4
4
exception handling
Rev. 4.00 Mar. 15, 2006 Page 63 of 556
CCR
CCR
PCH
PCL
*3
Section 3 Exception Handling
Even address
Total
15 to 37
REJ09B0026-0400

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