DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 290

• Manufacturer Part Number: DF36054GFPJV
• Description: MCU 3/5V 32K J-TEMP PB-FREE 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054GFPJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 Serial Communication Interface 3 (SCI3)
14.3.5
SMR is used to set the SCI3’s serial transfer format and select the baud rate generator clock
source.
Rev. 4.00 Mar. 15, 2006 Page 256 of 556
REJ09B0026-0400
Bit
7
6
5
4
3
2
Bit Name
COM
CHR
PE
PM
STOP
MP
Serial Mode Register (SMR)
Initial
Value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
Character Length (enabled only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length.
Parity Enable (enabled only in asynchronous mode)
When this bit is set to 1, the parity bit is added to transmit
data before transmission, and the parity bit is checked in
reception.
Parity Mode (enabled only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
Stop Bit Length (enabled only in asynchronous mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
For reception, only the first stop bit is checked, regardless
of the value in the bit. If the second stop bit is 0, it is
treated as the start bit of the next transmit character.
Multiprocessor Mode
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and PM
bit settings are invalid in multiprocessor mode. In clocked
synchronous mode, clear this bit to 0.