DF2238RTF6 Renesas Electronics America, DF2238RTF6 Datasheet - Page 183

MCU 2.2/3V 256K 100-TQFP

DF2238RTF6

Manufacturer Part Number
DF2238RTF6
Description
MCU 2.2/3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2238RTF6

Core Processor
H8S/2000
Core Size
16-Bit
Speed
6MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2238RTF6
HD64F2238RTF6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2238RTF6V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4.3
A reset has the highest exception priority.
When the RES or MRES pin goes low, all processing halts and this LSI enters the reset. A reset
initializes the internal state of the CPU and the registers of on-chip peripheral modules. The
interrupt control mode is 0 immediately after reset.
When the RES or MRES pin goes high from the low state, this LSI starts reset exception handling.
The chip can also be reset by overflow of the watchdog timer. For details see section 13,
Watchdog Timer (WDT).
4.3.1
The power-on reset and the manual reset are available as the reset.
Table 4.3 lists the reset types. When the power is supplied, select the power-on reset.
Both the power-on reset and the manual reset initialize the internal state of the CPU. The power-
on reset initializes all registers in on-chip peripheral modules. The manual reset initializes the
registers in on-chip peripheral modules except the bus controller and the I/O ports. The state of the
bus controller and the I/O ports are maintained.
At the manual reset, the on-chip peripheral modules are initialized. Thus, the ports that are used as
I/O pins for the on-chip peripheral modules are changed to the ports controlled by the DDR and
the DR.
Table 4.3
Power-on reset
Manual reset
Legend: ×:Don’t care
The power-on reset and the manual reset are also available for the reset by the watchdog timer.
To enable the MRES pin, set the MRESE bit in SYSCR to 1.
Reset
Reset
Reset Types
Reset Types
×
Low
MRES
to Enter Reset
Condition
RES
Low
High
Initialized
Initialized
CPU
Initialized
Initialized except the bus controller and the
I/O ports
Internal Peripheral Modules
Rev. 6.00 Mar. 18, 2010 Page 121 of 982
Internal State
Section 4 Exception Handling
REJ09B0054-0600

Related parts for DF2238RTF6