DF2238RTF6 Renesas Electronics America, DF2238RTF6 Datasheet - Page 621

MCU 2.2/3V 256K 100-TQFP

DF2238RTF6

Manufacturer Part Number
DF2238RTF6
Description
MCU 2.2/3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2238RTF6

Core Processor
H8S/2000
Core Size
16-Bit
Speed
6MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2238RTF6
HD64F2238RTF6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2238RTF6V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
3
2
Bit Name
MPIE
TEIE
Initial
Value
0
0
R/W
R/W
R/W
Description
Multiprocessor Interrupt Enable (enabled only
when the MP bit in SMR is 1 in asynchronous
mode)
When this bit is set to 1, receive data in which the
multiprocessor bit is 0 is skipped, and setting of the
RDRF, FER, and ORER status flags in SSR is
prohibited. On receiving data in which the
multiprocessor bit is 1, this bit is automatically
cleared and normal reception is resumed. For
details, refer to section 15.5, Multiprocessor
Communication Function.
When receive data including MPB = 0 is received,
receive data transfer from RSR to RDR, receive
error detection, and setting of the RERF, FER, and
ORER flags in SSR, are not performed.
When receive data including MPB = 1 is received,
the MPB bit in SSR is set to 1, the MPIE bit is
cleared to 0 automatically, and generation of RXI
and ERI interrupts (when the TIE and RIE bits in
SCR are set to 1) and FER and ORER flag setting
are enabled.
Transmit End Interrupt Enable
This bit is set to 1, TEI interrupt request is enabled.
TEI cancellation can be performed by reading 1
from the DRE flag in SSR, then clearing it to 0 and
clearing the TEND flag to 0, or clearing the TEIE
bit to 0.
Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 559 of 982
REJ09B0054-0600

Related parts for DF2238RTF6