MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 153

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
5.7.3.3 16-Bit Expanded Mode
MC68HC16Y3/916Y3
USER’S MANUAL
Data bus mode select current is specified in APPENDIX A ELECTRICAL CHARAC-
TERISTICS. Do not confuse pin function with pin electrical state. Refer to 5.7.5 Pin
State During Reset for more information.
16-bit data bus operation is selected when BERR = 1 and DATA1 = 0 during reset. In
this configuration, pins ADDR[18:3] and DATA[15:0] are configured as address and
data pins, respectively. The alternate functions for these pins as ports A, B, G, and H
are unavailable. ADDR[23:20] can be configured as chip selects or address bus pins.
ADDR[2:0] are configured as address bus pins.
DATA2 determines the functions of BR/CS0, FC0/CS3, and FC2/CS5. DATA[7:3]
determine the functions of ADDR[23:19]/CS[10:6]. A data bus pin pulled low selects
the associated chip select and all lower-numbered chip-selects down through CS6.
For example, if DATA5 is pulled low during reset, CS[8:6] are configured as address
bus signals ADDR[21:19], and CS[10:9] are configured as chip selects. On
MC68HC16Y3/916Y3 MCUs, ADDR[23:20] follow the state of ADDR19, and DA-
TA[7:4] have limited use. Refer to 5.9.4 Chip-Select Reset Operation for more infor-
mation.
DATA8 determines the function of the DSACK[1:0], DS, AS, and SIZ[1:0] pins. If
DATA8 is held low during reset, these pins are used for discrete I/O (port E).
DATA9 determines the function of interrupt request pins (IRQ[7:0]) and the clock mode
select pin (MODCLK). When DATA9 is held low during reset, these pins are used for
discrete I/O (port F).
DATA11 determines whether the SCIM2 operates in test mode out of reset. This
capability is used for factory testing of the MCU.
Figure 5-18 Alternate Circuit for Data Bus Mode Select Conditioning
DATA PIN
RESET
1N4148
1 k
DATA PIN
RESET
2 k
1 k
2N3906
ALTERNATE DATA BUS CONDITION CIRCUIT
MOTOROLA
5-45

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