MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 404

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
D.3.2 RAM Test Register
RAMTST — RAM Test Register
D.3.3 Array Base Address Registers
RAMBAH — Array Base Address Register High
RAMBAL — Array Base Address Register Low
D-26
MOTOROLA
RESET:
RESET:
ADDR
15
15
15
0
Used for factory test only.
RAMBAH and RAMBAL specify the SRAM array base address in the system memory
map. They can only be written while the SRAM is in low-power stop mode (STOP = 1,
the default out of reset) and the base address lock is disabled (RLCK = 0, the default
out of reset). This prevents accidental remapping of the array. Because the CPU16
drives ADDR[23:20] to the same logic level as ADDR19, the values of the RAMBAH
ADDR[23:20] fields must match the value of the ADDR19 field for the array to be
accessible. These registers may be read at any time. RAMBAH[15:8] are
unimplemented and will always read zero.
ADDR
14
14
0
ADDR
13
13
0
ADDR
NOT USED
12
12
0
ADDR
11
11
0
10
0
0
REGISTER SUMMARY
9
0
0
8
8
0
0
ADDR
23
7
0
7
0
0
ADDR
22
6
0
6
0
0
ADDR
21
5
0
5
0
0
ADDR
20
4
0
4
0
0
ADDR
19
3
0
3
0
0
MC68HC16Y3/916Y3
ADDR
USER’S MANUAL
18
2
0
2
0
0
$YFFB02
$YFFB04
$YFFB06
ADDR
17
1
0
1
0
0
ADDR
16
0
0
0
0
0

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