MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 299

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

13.8 Capture/Compare Unit
13.8.1 Timer Counter
13.8.2 Input Capture Functions
MC68HC16Y3/916Y3
USER’S MANUAL
The capture/compare unit contains the timer counter (TCNT), the input capture (IC)
functions and the output compare (OC) functions. Figure 13-3 is a block diagram of
the capture/compare unit.
The timer counter (TCNT) is the key timing component in the capture/compare unit.
The timer counter is a 16-bit free-running counter that starts counting after the
processor comes out of reset. The counter cannot be stopped during normal
operation. After reset, the GPT is configured to use the system clock divided by four
as the input to the counter. The prescaler divides the system clock and provides
selectable input frequencies. User software can configure the system to use one of
seven prescaler outputs or an external clock.
The counter can be read any time without affecting its value. Because the GPT is
interfaced to the IMB, and the IMB supports a 16-bit bus, a word read gives a coherent
value. If coherency is not needed, byte accesses can be made. The counter is set to
$0000 during reset and is normally a read-only register. In test mode and freeze mode,
any value can be written to the timer counter.
When the counter rolls over from $FFFF to $0000, the timer overflow flag (TOF) in tim-
er interrupt flag register 2 (TFLG2) is set. An interrupt can be enabled by setting the
corresponding interrupt enable bit (TOI) in timer interrupt mask register 2 (TMSK2).
Refer to 13.4.2 GPT Interrupts for more information.
All GPT input capture functions use the same 16-bit timer counter (TCNT). Each input
capture pin has a dedicated 16-bit latch and input edge-detection/selection logic. Each
input capture function has an associated status /selection logic. Each input capture
function has an associated status flag, and can cause the GPT to make an interrupt
service request.
When a selected edge transition occurs on an input capture pin, the associated 16-bit
latch captures the content of TCNT and sets the appropriate status flag. An interrupt
request can be generated when the transition is detected.
GENERAL-PURPOSE TIMER
MOTOROLA
13-11