MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 444

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

D.8.7 MCCI Data Direction Register
MDDR — MCCI Data Direction Register
D-66
MOTOROLA
RESET:
15
SPI pins designated by the MPAR as general-purpose I/O are controlled only by
MDDR and PORTMC. The SPI has no effect on these pins. The MPAR does not affect
the operation of the SCI submodule.
MDDR determines whether pins configured for general purpose I/O are inputs or
outputs. MDDR affects both SPI function and I/O function. During reset, all MCCI pins
are configured as inputs. Table D-43 shows the effect of MDDR on MCCI pin function.
NOTES:
MCCI Pin
RXDB
TXDB
TXDA
RXDA
MISO
MOSI
SCK
1. SCK is automatically assigned to the SPI whenever the SPI is enabled (when the SPE
2. PMC4 and PMC6 function as general purpose I/O pins when the corresponding RE bit
3. PMC5 and PMC7 function as general purpose I/O pins when the corresponding TE bit in
SS
bit in the SPCR1 is set).
in the SCI control register (SCCR0A or SCCR0B) is cleared.
the SCI control register (SCCR0A or SCCR0B) is cleared.
1
3
3
2
Table D-43 Effect of MDDR on MCCI Pin Function
NOT USED
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
—
—
—
—
MDDR Bit
DDR0
DDR1
DDR2
DDR3
DDR4
DDR5
DDR6
DDR7
8
Bit State
DDR7
7
0
—
—
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DDR6
6
0
Serial data output from SCIB
Serial data output from SCIA
Assertion causes mode fault
Serial data output from SPI
Serial data output from SPI
Disables slave-select input
Serial data input to SCIB
Serial data input to SCIA
DDR5
Serial data input to SPI
Serial data input to SPI
Clock output from SPI
SPI slave-select input
5
0
Disables data output
Disables data output
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
Disables data input
Disables data input
Clock input to SPI
Pin Function
DDR4
4
0
DDR3
3
0
MC68HC16Y3/916Y3
DDR2
USER’S MANUAL
2
0
$YFFC0A
DDR1
1
0
DDR0
0
0