C8051F352 Silicon Laboratories Inc, C8051F352 Datasheet - Page 40

• Manufacturer Part Number: C8051F352
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F352

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: C8051F35x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• On-chip Dac: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

C8051F350/1/2/3
5.1.
Configuration
ADC0 is enabled by setting the AD0EN bit in register ADC0MD (Figure 5.7) to ‘1’. When the ADC is dis-
abled, it is placed in a low-power shutdown mode with all clocks turned off, to minimize unnecessary power
consumption. The ADC will retain all of its settings in shutdown mode, with the exception of the AD0SM
bits, which are reset to 000b (Idle Mode).
5.1.1. Voltage Reference Selection
The ADC’s voltage reference is selected using the AD0VREF bit in register ADC0CN (Figure 5.5). When
set to ‘1’, the ADC uses an external voltage reference source. When cleared to ‘0’, the internal reference is
used. A more detailed description of the voltage reference options can be found in
Section “7. Voltage Ref-
erence” on page
67.
5.1.2. Analog Inputs
The ADC’s analog inputs are connected to external device pins or internal voltages as described in
Section
“5.6. Analog Multiplexer” on page
57. They can be configured as either single-ended (one independent
input measured with respect to AGND) or differential (two independent inputs measured with respect to
each other). For accurate measurements, the ADC inputs must remain within the input range specifications
found in Table 5.3. To prevent damage to the device, all external ADC inputs must also remain within the
Absolute Maximum ratings for the input pin, given in Table 2.1.
5.1.2.1. Programmable Gain Amplifier
A programmable gain amplifier (PGA) provides amplification settings of 1, 2, 4, 8, 16, 32, 64, and 128 for
the ADC inputs. The PGA gain setting is controlled by the AD0GN bits in register ADC0CN (Figure 5.5).
5.1.2.2. Input Buffers
Independent input buffers are included for AIN+ and AIN-, as shown in Figure 5.2. Each input has a set of
two buffers that can be used to minimize the input current of the ADC for sensitive measurements. The
“low” input buffer can be used when the absolute pin input voltage is in the lower half of the supply range.
The “high” input buffer on each pin can be used when the absolute pin input voltage is in the upper half of
the supply range. See Table 5.3 for the input buffer range specifications. The input buffers can also be
bypassed, for a direct connection to the PGA inputs. The ADC input buffers are controlled with the
ADC0BUF register (Figure 5.12).
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Rev. 0.4