C8051F352 Silicon Laboratories Inc, C8051F352 Datasheet - Page 51

• Manufacturer Part Number: C8051F352
• Description: IC 8051 MCU 8K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F35xr

Specifications of C8051F352

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x16b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: C8051F35x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• On-chip Dac: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Bit 7:
Bit 6:
Bits 5-4: AD0BPS: Positive Channel Input Selection.
Bit 3:
Bit 2:
Bits 1-0: AD0BNS: Negative Channel Input Selection.
This SFR can only be modified when ADC0 is in IDLE mode.
AD0BPHE AD0BPLE
R/W
Bit7
AD0BPHE: Positive Channel High Buffer Enable.
0: Positive Channel High Input Buffer Disabled.
1: Positive Channel High Input Buffer Enabled.
AD0BPLE: Positive Channel Low Enable.
0: Positive Channel Low Input Buffer Disabled.
1: Positive Channel Low Input Buffer Enabled.
00 = Bypass Input Buffer (default).
01 = Select Low Input Buffer Range.
10 = Select High Input Buffer Range.
11 = Reserved.
AD0BNHE: Negative Channel High Buffer Enable.
0: Negative Channel High Input Buffer Disabled.
1: Negative Channel High Input Buffer Enabled.
AD0BNLE: Negative Channel Low Enable.
0: Negative Channel Low Input Buffer Disabled.
1: Negative Channel Low Input Buffer Enabled.
00 = Bypass Input Buffer (default).
01 = Select Low Input Buffer Range.
10 = Select High Input Buffer Range.
11 = Reserved.
Figure 5.12. ADC0BUF: ADC0 Input Buffer Control Register
R/W
Bit6
R/W
Bit5
AD0BPS
R/W
Bit4
AD0BNHE AD0BNLE
Rev. 0.4
R/W
Bit3
R/W
Bit2
C8051F350/1/2/3
R/W
Bit1
AD0BNS
SFR Address:
R/W
Bit0
0xBD
00000000
Reset Value
51