HD6417020SVX12I Renesas Electronics America, HD6417020SVX12I Datasheet - Page 363

• Manufacturer Part Number: HD6417020SVX12I
• Description: IC SUPERH MPU ROMLESS 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SVX12I

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 12.5MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

• Bit 6 (character length (CHR)): CHR selects seven-bit or eight-bit data in the asynchronous
Bit 6: CHR
0
1
• Bit 5 (parity enable (PE)): PE selects whether to add a parity bit to transmit data and check the
Bit 5: PE
0
1
• Bit 4 (parity mode (O/E): O/E selects even or odd parity when parity bits are added and
Bit 4: O/E
0
1
RENESAS 346
mode. In the clocked synchronous mode, the data length is always eight bits, regardless of the
CHR setting.
parity of receive data, in the asynchronous mode. In the clocked synchronous mode, a parity
bit is neither added nor checked, regardless of the PE setting.
checked. The O/E setting is used only in asynchronous mode and only when the parity enable
bit (PE) is set to 1 to enable parity addition and check. The O/E setting is ignored in the
clocked synchronous mode, or in the asynchronous mode when parity addition and check is
disabled.
Description
Eight-bit data (initial value)
Seven-bit data. When seven-bit data is selected, the MSB (bit 7) of the
transmit data register is not transmitted.
Description
Parity bit not added or checked (initial value)
Parity bit added and checked. When PE is set to 1, an even or odd
parity bit is added to transmit data, depending on the parity mode (O/E)
setting. Receive data parity is checked according to the even/odd (O/E)
mode setting.
Description
Even parity. If even parity is selected, the parity bit added to transmit
data makes an even number of 1s in the transmitted character and
parity bit combined. Receive data must have an even number of 1s in
the received character and parity bit combined (initial value).
Odd parity. If odd parity is selected, the parity bit added to transmit
data makes an odd number of 1s in the transmitted character and
parity bit combined. Receive data must have an odd number of 1s in
the received character and parity bit combined.