HD6417020SVX12I Renesas Electronics America, HD6417020SVX12I Datasheet - Page 86

IC SUPERH MPU ROMLESS 100TQFP

HD6417020SVX12I

Manufacturer Part Number
HD6417020SVX12I
Description
IC SUPERH MPU ROMLESS 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SVX12I

Core Processor
SH-1
Core Size
32-Bit
Speed
12.5MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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5.2.5
Interrupt Exception Vectors and Priority Rankings
Table 5.3 lists the vector numbers, vector table address offsets, and interrupt priority order of the
interrupt sources.
Each interrupt source is allocated a different vector number and vector table address offset. The
vector table address is calculated from this vector number and address offset. In interrupt
exception processing, the exception service routine start address is fetched from the vector table
indicated by this vector table address. See table 4.3, Calculation of Exception Vector table
Addresses, in section 4, Exception Processing, for details on this calculation.
Arbitrary interrupt priority levels between 0 and 15 can be assigned to IRQ and on-chip peripheral
module interrupt sources by setting interrupt priority registers A–E (IPRA–IPRE) for each pin or
module. The interrupt sources for IPRC–IPRE, however, must be ranked in the order listed under
Priority Within Module in table 5.3 and cannot be changed. A reset assigns priority level 0 to IRQ
and on-chip peripheral module interrupts. If the same priority level is assigned to two or more
interrupt sources, and interrupts from those sources occur simultaneously, their priority order is
the default priority order indicated at the right in table 5.3.
RENESAS 65

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