HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 315

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Workarounds: To prevent the problem, use either of workarounds a. or b. below.
a. Include a NOP instruction in the eight words of data following each TRAPA instruction,
b. Include an OR R0,R0 instruction in the five words of data following each TRAPA instruction,
SLEEP instruction, or undefined instruction code H'FFFD.
SLEEP instruction, or undefined instruction code H'FFFD. This workaround also applies to
cases where “the eight words of data following the … instruction … contain H'Fxxx,” as
mentioned in condition 4. b., because two OR instructions are never executed simultaneously,
so a minimum of 5xIck is required for execution.
executed in 4xIck. The maximum number of instructions that can be executed in 2xIck or
4xIck is four or eight, respectively. Therefore, the affected codes are those occurring in
“the four words (or eight words) of data following the instruction.”
Rev.7.00 Oct. 10, 2008 Page 229 of 1074
Section 7 Instruction Set
REJ09B0366-0700