R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1110
![IC SUPERH MPU ROMLESS 436BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850BDBGV#RD0Z
Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850BDBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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21. Serial Communication Interface with FIFO (SCIF)
(4)
Figure 21.9 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev.1.00 Jan. 10, 2008 Page 1078 of 1658
REJ09B0261-0100
Serial Data Transmission (Asynchronous Mode)
Write transmit data in SCFTDR,
and clear TDFE and TEND bits
Clear TE bit in SCSCR to 0
Read TDFE flag in SCFSR
Read TEND bit in SCFSR
Clear SPB2DT to 0 and
Start of transmission
All data transmitted?
End of transmission
Figure 21.9 Sample Serial Transmission Flowchart
set SPB2IO to 1
in SCFSR to 0
Break output?
TDFE = 1?
TEND = 1?
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[1] SCIF status check and transmit data
[2] Serial transmission continuation
[3] Break output at the end of serial
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR, and clear
the TDFE and TEND flags to 0.
The number of transmit data bytes
that can be written is 64 - (transmit
trigger setting count).
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR, and then clear the TDFE
flag to 0.
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR, then clear the TE bit in
SCSCR to 0.
In [1] and [2], it is possible to
ascertain the number of data bytes
that can be written from the number
of transmit data bytes in SCFTDR
indicated by SCTFDR.
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