R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1372
![IC SUPERH MPU ROMLESS 436BGA](/photos/28/62/286211/436-bfbga_sml.jpg)
R8A77850BDBGV#RD0Z
Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet
1.R8A77850AADBGV.pdf
(1694 pages)
Specifications of R8A77850BDBGV#RD0Z
Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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27. NAND Flash Memory Controller (FLCTL)
27.2
Table 27.1 shows the pin configuration of the FLCTL.
Table 27.1 Pin Configuration
Rev.1.00 Jan. 10, 2008 Page 1340 of 1658
REJ09B0261-0100
Pin Name Function
FCE
FD7 to
FD0
FCLE
FALE
FRE
FWE
Input/Output Pins
Chip enable
Data I/O
Command latch
enable
Address latch
enable
Read enable
Write enable
I/O
Output
I/O
Output
Output
Output
Output
Corresponding
Flash Memory
Pin
NAND Type
CE
I/O7 to I/O0
CLE
ALE
RE
WE
Description
Enables flash memory connected to this
LSI.
Multiplexed with SCIF0_CTS/INTD.
I/O pins for command, address, and data.
Multiplexed with MODE3/IRL7,
MODE2/IRL6, MODE1/IRL5,
MODE0/IRL4, MODE11/SCIF4_SCK,
MODE10/SCIF4_RXD,
MODE9/SCIF4_TXD, and
MODE8/SCIF3_SCK.
Command Latch Enable (CLE)
Asserted when a command is output.
Multiplexed with MODE4/SCIF3_TXD.
Address Latch Enable (ALE)
Asserted when an address is output.
Negated when data is input or output.
Multiplexed with MODE7/SCIF3_RXD.
Read Enable (RE)
Reads data at the falling edge of RE.
Multiplexed with SCIF0_SCK/HSPI_CLK.
Write Enable
Flash memory latches a command,
address, and data at the rising edge of
WE.
Multiplexed with
SCIF0_TXD/HSPI_TX/MODE8.
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