R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 738

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
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Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14. Direct Memory Access Controller (DMAC)
14.4.2
When the DMAC receives transfer requests on two or more channels simultaneously, it transfers
data according to a determined priority. Modes are chosen from among fixed mode and round-
robin mode. Modes are selected by bits PR1 and PR0 in DMAOR0 (channels 0 to 5) and
DMAOR1 (channels 6 to 11).
The relationship between channels 0 to 5 and channels 6 to 11 is round-robin.
The priority immediately after reset is CH0 to CH5 > CH6 to CH11.
(1)
In fixed mode, the channel priority does not change. There are two kinds of fixed modes as
follows.
• Channels 0 to 5
• Channels 6 to 11
These are selected by bits PR1 and PR0 in DMAOR0 and DMAOR1.
(2)
In round-robin mode, each time data of one transfer unit (byte, word, longword, 16-byte, or 32-
byte unit) is transferred on one channel, the channel on which the transfer has just ended is the
bottom of the priority. Figure 14.2 shows the round-robin mode operation. The priority of round-
robin mode immediately after reset is CH0 > CH1 > CH2 > CH3 > CH4 > CH5, and CH6 > CH7
> CH8 > CH9 > CH10 > CH11.
When round-robin mode is specified, do not mix cycle steal mode and burst mode in all channels
(channels 0 to 5) corresponding to DMAOR0.
All channels (channels 6 to 11) corresponding to DMAOR1 can be set in only normal mode 2
(CHCR.LCKN=1, CHCR.TB=0) for cycle steal mode.
Rev.1.00 Jan. 10, 2008 Page 706 of 1658
REJ09B0261-0100
⎯ CH0 > CH1 > CH2 > CH3 > CH4 > CH5
⎯ CH0 > CH2 > CH3 > CH1 > CH4 > CH5
⎯ CH6 > CH7 > CH8 > CH9 > CH10 > CH11
⎯ CH6 > CH8 > CH9 > CH7 > CH10 > CH11
Fixed Mode
Round-Robin Mode
Channel Priority

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