R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 24

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

20.4 GDTA Operation ............................................................................................................. 1013
20.5 Interrupt Processing ......................................................................................................... 1029
20.6 Data Alignment................................................................................................................ 1029
20.7 Usage Notes ..................................................................................................................... 1031
Section 21 Serial Communication Interface with FIFO (SCIF)
21.1 Features............................................................................................................................ 1033
21.2 Input/Output Pins............................................................................................................. 1039
21.3 Register Descriptions....................................................................................................... 1040
Rev.1.00 Jan. 10, 2008 Page xxii of xxx
REJ09B0261-0100
20.3.21 MC Command FIFO (MCCF) .......................................................................... 1000
20.3.22 MC Status Register (MCSR) ............................................................................ 1003
20.3.23 MC Frame Width Setting Register (MCWR) ................................................... 1004
20.3.24 MC Frame Height Setting Register (MCHR) ................................................... 1005
20.3.25 MC Y Padding Size Setting Register (MCYPR) .............................................. 1006
20.3.26 MC UV Padding Size Setting Register (MCUVPR) ........................................ 1007
20.3.27 MC Output Frame Y Pointer Register (MCOYPR).......................................... 1008
20.3.28 MC Output Frame U Pointer Register (MCOUPR).......................................... 1008
20.3.29 MC Output Frame V Pointer Register (MCOVPR).......................................... 1009
20.3.30 MC Past Frame Y Pointer Register (MCPYPR)............................................... 1009
20.3.31 MC Past Frame U Pointer Register (MCPUPR)............................................... 1010
20.3.32 MC Past Frame V Pointer Register (MCPVPR)............................................... 1010
20.3.33 MC Future Frame Y Pointer Register (MCFYPR) ........................................... 1011
20.3.34 MC Future Frame U Pointer Register (MCFUPR) ........................................... 1011
20.3.35 MC Future Frame V Pointer Register (MCFVPR) ........................................... 1012
20.4.1
20.4.2
20.7.1
20.7.2
20.7.3
21.3.1
21.3.2
21.3.3
21.3.4
21.3.5
21.3.6
21.3.7
21.3.8
21.3.9
21.3.10 Transmit FIFO Data Count Register n (SCTFDR) ........................................... 1064
21.3.11 Receive FIFO Data Count Register n (SCRFDR) ............................................ 1065
Explanation of CL Operation............................................................................ 1013
Explanation of MC Operation........................................................................... 1019
Regarding Module Stoppage ............................................................................ 1031
Regarding Deep Sleep Modes........................................................................... 1031
Regarding Frequency Changes ......................................................................... 1032
Receive Shift Register (SCRSR) ...................................................................... 1046
Receive FIFO Data Register (SCFRDR) .......................................................... 1046
Transmit Shift Register (SCTSR) ..................................................................... 1047
Transmit FIFO Data Register (SCFTDR)......................................................... 1047
Serial Mode Register (SCSMR) ....................................................................... 1048
Serial Control Register (SCSCR) ..................................................................... 1051
Serial Status Register n (SCFSR) ..................................................................... 1055
Bit Rate Register n (SCBRR) ........................................................................... 1061
FIFO Control Register n (SCFCR) ................................................................... 1062
........................... 1033