DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 75

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 2: Board Components
Power Supply
Table 2–58. Power Rail Measurements Based on the Rotary Switch Position (Part 2 of 2)
Table 2–59. Power Measurement ADC Component References and Manufacturing Information
August 2010 Altera Corporation
6
7
8
9
A
B
C
D
E
F
Note for
(1) The targeted power rails whose voltage values on the engineering silicon board differ from the production silicon board are listed in
U1, U36
U9
Board Reference
Switch
on page
Table
Temperature Sense
A–2.
Schematic Signal Name
2–58:
S4VCCIO_B1B2
S4VCCIO_B3B4
S4VCCIO_B3A
S4VCCD_PLL
S4VCCA_GXB
S4VCCIO_B5
S4VCCIO_B6
S4VCC_GXB
8-channel differential 24-bit ADC
1-channel differential 12-bit ADC
S4VCCPT
Table 2–59
manufacturing information.
Temperature monitoring for the Stratix IV GX FPGA die is achieved with a MAX1619
temperature sense device. The MAX1619 device is connected to the MAX II CPLD
EPM2210 System Controller and the Stratix IV GX device by a 2-wire SMB interface.
The MAX 1619 device is located at address 0x1. This bus is also routed to a single
voltage and power monitor chip for the 12-V power rail at address 0x2.
The OVERTEMPn and TSENSE_ALERTn signals are driven by the MAX1619 temperature
sense device based on a programmable threshold temperature. The OVERTEMPn signal
is driven to the MAX II EPM2210 System Controller which controls OVERTEMPn. When
the OVERTEMPn signal goes high, the on-board fan is enabled. The MAX II EPM2210
System Controller can control fan speed based on a register setting and can also
override the MAX1619 device with the FAN_FORCE_ON DIP switch to force the fan to be
on constantly at full speed. For more information on this control, refer to the MAX II
EPM2210 System Controller source code found in the development board installation
directory <install dir>\stratixIVGX_4sgx230_fpga \examples\max2.
—
Description
lists the power measurement ADC component references and
Voltage (V)
1.5
0.9
3.0
2.5
2.5
2.5
1.8
1.5
1.1
—
Linear Technology
Linear Technology
Manufacturer
VCCIO_B3A
Device Pin
VCCD_PLL
VCCL_GXB
VCCIO_B5
VCCIO_B6
VCCIO_B1
VCCIO_B2
VCCIO_B3
VCCIO_B4
VCCPT
VCCA
VCCR
VCCT
—
Stratix IV GX FPGA Development Board Reference Manual
Programmable power tech
PLL digital
XCVR analog TX/RX driver (mA only)
Bank 5 I/O power (HSMC port A)
Bank 6 I/O power (HSMC port B)
Bank 1 I/O power (FSM bus)
Bank 2 I/O power (FSM bus)
Bank 3A I/O power (HDMI)
Bank 3 I/O power (DDR3BOT)
Bank 4 I/O power (DDR3BOT)
XCVR analog receive
XCVR analog transmit
XCVR clock distribution
LTC2418CGN#PBF
LTC4151CDD#PBF
Manufacturing
Part Number
(Note 1)
Description
—
www.linear.com
www.linear.com
Manufacturer
Website
Table A–2
2–67