DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 19

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 2: Board Components
Configuration, Status, and Setup Elements
Table 2–6. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 5 of 5)
Table 2–7. MAX II CPLD EPM2210 System Controller Component Reference and Manufacturing Information
Configuration, Status, and Setup Elements
August 2010 Altera Corporation
CLK100_SDA
CLK100_SCL
CLK125_EN
CLK148_EN
CLK155_EN
CLK156_EN
CLKIN_50
CLK_CONFIG
U30
Board Reference
Schematic Signal
Name
Configuration
IC - MAX II CPLD EPM2210
256FBGA -3 LF 1.8V VCCINT
Table 2–7
and manufacturing information.
This section describes the board's configuration, status, and setup elements.
This section describes the FPGA, flash memory, and MAX II CPLD EPM2210 System
Controller device programming methods supported by the Stratix IV GX FPGA
development board. The Stratix IV GX FPGA development board supports three
configuration methods:
■
■
■
FPGA Programming over Embedded USB-Blaster
The USB-Blaster is implemented using a type-B USB connector (J7), a FTDI USB 2.0
PHY device (U39), and an Altera MAX II CPLD (U30). This allows the configuration
of the FPGA using a USB cable directly connected between the USB port on the board
(J7) and a USB port of a PC running the Quartus II software. The JTAG chain is
normally mastered by the embedded USB-Blaster found in the MAX II CPLD
EPM2210 System Controller.
I/O Standard
Embedded USB-Blaster is the default method for configuring the FPGA at any
time using the Quartus II Programmer in JTAG mode with the supplied USB cable.
Flash memory download is used for configuring the FPGA using stored images
from the flash memory on either power-up or pressing the reset configuration
push-button switch (S1).
External USB-Blaster for configuring the FPGA using the external USB-Blaster.
Description
2.5-V
2.5-V
2.5-V
2.5-V
2.5-V
2.5-V
2.5-V
2.5-V
lists the MAX II CPLD EPM2210 System Controller component reference
Pin Number
EPM2210
C15
H16
H13
H15
H14
J12
A2
J5
Altera Corporation
Manufacturer
EP4SGX230
Pin Number
AC34
—
—
—
—
—
—
—
100 MHz programming data
100 MHz programming clock
125 MHz oscillator enable
148 MHz oscillator enable
155 MHz oscillator enable
156 MHz oscillator enable
50 MHz clock input
125 MHz configuration clock
Stratix IV GX FPGA Development Board Reference Manual
EPM2210GF256C3N
Manufacturing
Part Number
Description
www.altera.com
Manufacturer
Website
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