CY7C65113C-SXCT Cypress Semiconductor Corp, CY7C65113C-SXCT Datasheet - Page 32

• Manufacturer Part Number: CY7C65113C-SXCT
• Description: IC,MICROCONTROLLER,8-BIT,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C65113C-SXCT

• Applications: USB Hub/Microcontroller
• Core Processor: M8
• Program Memory Type: OTP (8 kB)
• Controller Series: USB Hub
• Ram Size: 256 x 8
• Interface: I²C, USB
• Number Of I /o: 11
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: CY7C65xx
• Core: M8
• Data Bus Width: 16 bit
• Program Memory Size: 8 KB
• Data Ram Size: 256 B
• Interface Type: I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 11
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details

Bits[6..0]: Device Address.
Bit 7: Device Address Enable.
Table 10. Memory Allocation for Endpoints
When the SIE writes data to a FIFO, the internal data bus is
driven by the SIE; not the CPU. This causes a short delay in the
CPU operation. The delay is three clock cycles per byte. For
example, an 8-byte data write by the SIE to the FIFO generates
a delay of 2 s (3 cycles/byte * 83.33 ns/cycle * 8 bytes).
USB Control Endpoint Mode Registers
All USB devices are required to have a control endpoint 0 (EPA0
and EPB0) that is used to initialize and control each USB
address. Endpoint 0 provides access to the device configuration
Bits[3..0]: Mode.
Bit 4: ACK.
Bit 5: Endpoint 0 OUT Received.
Document #: 38-08002 Rev. *F
Label
EPB1
EPB0
EPA2
EPA1
EPA0
USB Device Endpoint Zero Mode (A0, B0)
Bit #
Bit Name
Read/Write
Reset
Two USB Addresses:
A (3 Endpoints) and
Firmware writes this bits during the USB enumeration pro-
cess to the non-zero address assigned by the USB host.
Must be set by firmware before the SIE can respond to
USB traffic to the Device Address.
These sets the mode which control how the control end-
point responds to traffic.
This bit is set whenever the SIE engages in a transaction
to the register’s endpoint that completes with an ACK
packet.
1 = Token received is an OUT token. 0 = Token received
is not an OUT token. This bit is set by the SIE to report the
type of token received by the corresponding device ad-
B (2 Endpoints)
Start Address Size
[0,0]
0xD8
0xE0
0xE8
0xF0
0xF8
Endpoint 0
Received
SETUP
R/W
7
0
8
8
8
8
8
Label
EPB0
EPB1
EPA0
EPA1
EPA2
Endpoint 0
Received
USB Status And Control Register (0x1F) Bits [7, 6]
Two USB Addresses:
Figure 33. USB Device Endpoint Zero Mode Registers
R/W
A (3 Endpoints) and
IN
6
0
B (2 Endpoints)
Start Address Size
[1,0]
0xA8
0xB0
0xB8
0xC0
0xE0
Endpoint 0
Received
OUT
R/W
5
0
32
32
8
8
8
ACK
R/W
Label
EPA4
EPA3
EPA2
EPA1
EPA0
4
0
USB Device Endpoints
The CY7C65113C controller supports up to two addresses and
five endpoints for communication with the host. The configu-
ration of these endpoints, and associated FIFOs, is controlled by
bits [7,6] of the USB Status and Control Register
controls the size of the endpoints and bit 6 controls the number
of addresses. These configuration options are detailed in
Table
Section ).
information and allows generic USB status and control accesses.
Endpoint 0 is bidirectional to both receive and transmit data. The
other endpoints are unidirectional, but selectable by the user as
IN or OUT endpoints.
The endpoint mode registers are cleared during reset. When
USB Status And Control Register Bits [6,7] are set to [0,0] or
[1,0], the endpoint zero EPA0 and EPB0 mode registers use the
format shown in
Bit 6: Endpoint 0 IN Received.
Bit 7: Endpoint 0 SETUP Received.
One USB Address:
A (5 Endpoints)
10. Endpoint FIFOs are part of user RAM (as shown in
dress is an OUT token. The bit must be cleared by firm-
ware as part of the USB processing.
1 = Token received is an IN token. 0 = Token received is
not an IN token. This bit is set by the SIE to report the type
of token received by the corresponding device address is
an IN token. The bit must be cleared by firmware as part
of the USB processing.
1 = Token received is a SETUP token. 0 = Token received
is not a SETUP token. This bit is set ONLY by the SIE to
Start Address Size
Mode Bit 3
[0,1]
0xD8
0xE0
0xE8
0xF0
0xF8
R/W
3
0
Figure
Mode Bit 2
Addresses 0x12(A0) and 0x42(B0)
33.
8
8
8
8
8
R/W
2
0
Label Start Address Size
EPA3
EPA4
EPA0
EPA1
EPA2
One USB Address:
Mode Bit 1
A (5 Endpoints)
R/W
1
0
[1,1]
CY7C65113C
0xC0
0xA8
0xB0
0xB8
0xE0
(Figure
Mode Bit 0
Page 32 of 48
R/W
0
0
32
32
8
8
8
). Bit 7
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