CY7C65113C-SXCT Cypress Semiconductor Corp, CY7C65113C-SXCT Datasheet - Page 8

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CY7C65113C-SXCT

Manufacturer Part Number
CY7C65113C-SXCT
Description
IC,MICROCONTROLLER,8-BIT,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C65113C-SXCT

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Processor Series
CY7C65xx
Core
M8
Data Bus Width
16 bit
Program Memory Size
8 KB
Data Ram Size
256 B
Interface Type
I2C
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
11
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3654, CY3654-P03
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / Rohs Status
 Details
Programming Model
14-bit Program Counter
The 14-bit Program Counter (PC) allows access to up to 8 KB of
PROM available with the CY7C65113C architecture. The top
32 bytes of the ROM in the 8K part are reserved for testing
purposes. The program counter is cleared during reset, such that
the first instruction executed after a reset is at address 0x0000h.
Typically, this is a jump instruction to a reset handler that
initializes the application (see
The lower eight bits of the program counter are incremented as
instructions are loaded and executed. The upper six bits of the
program counter are incremented by executing an XPAGE
instruction. As a result, the last instruction executed within a
256-byte “page” of sequential code should be an XPAGE
Document #: 38-08002 Rev. *F
Table 3. Instruction Set Summary (continued)
MOV X,expr
MOV X,[expr]
reserved
XPAGE
MOV A,X
MOV X,A
MOV PSP,A
CALL
JMP
CALL
JZ
JNZ
MNEMONIC
data
direct
addr
addr
addr
addr
addr
operand
Interrupt Vectors on page
1C
1D
1E
1F
40
41
60
50-5F
80-8F
90-9F
A0-AF
B0-BF
opcode
4
5
4
4
4
4
10
5
10
5 (or 4)
5 (or 4)
cycles
23).
instruction. The assembler directive “XPAGEON” causes the
assembler to insert XPAGE instructions automatically. Because
instructions can be either one or two bytes long, the assembler
may occasionally need to insert a NOP followed by an XPAGE
to execute correctly.
The address of the next instruction to be executed, the carry flag,
and the zero flag are saved as two bytes on the program stack
during an interrupt acknowledge or a CALL instruction. The
program counter, carry flag, and zero flag are restored from the
program stack during a RETI instruction. Only the program
counter is restored during a RET instruction.
The program counter cannot be accessed directly by the
firmware. The program stack can be examined by reading SRAM
from location 0x00 and up.
ASR
RLC
RRC
RET
DI
EI
RETI
JC
JNC
JACC
INDEX
MNEMONIC
addr
addr
addr
addr
operand
3C
3D
3E
3F
70
72
73
C0-CF
D0-DF
E0-EF
F0-FF
opcode
CY7C65113C
4
4
4
8
4
4
8
5 (or 4)
5 (or 4)
7
14
Page 8 of 48
cycles
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