CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 11

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3 Architecture and operation
In this part the most important blocks of the sensor are described in more detail.
3.1 Floor plan
Figure 3 shows the architecture of the IBIS5-A-1300 image sensor. It consists basically of
a pixel array, one X- and two Y-addressing registers for the readout in X- and Y-
direction, column amplifiers that correct for the fixed pattern noise, an analog multiplexer
and an analog output amplifier.
The left Y-addressing register is used for readout operation. The right Y-addressing
register is used for reset of pixel row(s):
Most of the signals for the image core are generated by the on-chip sequencer. Some basic
signals (like start/stop integration, line and frame sync signals, etc…) have to be
generated externally.
addressing
• In multiple slope synchronous shutter mode, the right Y-addressing register resets
• In rolling curtain shutter mode, the right Y-addressing register is used for the reset
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
Y-left
the whole pixel core with a lowered reset voltage.
pointer in single and double slope operation to reset 1 pixel row.
Datasheet
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Pixel
Figure 3: Block diagram of the IBIS5-A-1300 image sensor
Column amplifiers
X-addressing
Analog multiplexer
Pixel core
Document #: 38-05710 Rev.**(Revision 1.3)
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Imager core
Y-right
addressing
Output
amplifier
Sequencer
ADC
Sensor
San Jose, CA 95134
System clock
40 MHz
External
connection
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Sample
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Column output
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