CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 51

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5 Pin list
The IBIS5-A-1300 image sensor is packaged in a leadless ceramic carrier (LCC package).
Table 29 is a list of all the pins and their function. In total, there are 84 pins.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin
Contact
Cypress Semiconductor Corporation
IBIS5-A-1300
Datasheet
Pin name
P_DATA<8>
P_WR
S_CLK
S_DATA
S_EN
SER_MODE
VDDC
VDDA
GNDA
GNDD
VDDD
IF_MODE
DEC_CMD
Y_START
Y_CLOCK
LAST_LINE
X_LOAD
SYS_CLOCK
PXL_VALID
SS_START
SS_STOP
TIME_OUT
SYS_RESET
EL_BLACK
EOSX
[e-mail]
Pin type
Input
Input
Input
Input
Input
Input
Supply
Supply
Ground
Ground
Supply
Input
Input
Input
Input
Output
Input
Input
Output
Input
Input
Output
Input
Input
Output
Document #: 38-05710 Rev.**(Revision 1.3)
3901 North First Street
Table 29: Pin list
Pin description
Digital input. Data parallel interface.
Digital input (active high). Parallel write.
Digital input. Clock signal of serial interface.
Digital input/output. Data of serial interface.
Digital input (active low). Enable of Serial-3-wire
interface.
Digital input. Serial mode enable (1=Enable serial-3-
wire, 0=disable).
Analog supply voltage. Supply voltage of the pixel
core [3.3V].
Analog supply voltage. Analog supply voltage of the
image sensor [3.3V].
Analog ground. Analog ground of the image sensor.
Digital ground. Digital ground of the image sensor.
Digital supply voltage. Digital supply voltage of the
image sensor [3.3V].
Digital input. Interface mode (1=parallel; 0=serial).
Analog input. Biasing of decoder stage. Connect to
VDDA with R = 50 kΩ and decouple with C=100nF to
GNDA.
Digital input (active high). Start frame read out.
Digital input (active high). Line clock.
Digital output. Generates a high level when the last line
is read out.
Digital input (active high). Loads new X-position
during read out.
Digital input. System (pixel) clock (40 MHz).
Digital output. Generates high level during pixel read
out.
Digital input (active high). Start synchronous shutter
operation.
Digital input (active high). Stop synchronous shutter
operation.
Digital output.
Synchronous shutter: pulse when time-out reached. Can
be used to trigger SS_STOP although both signals can’t
be tied together.
Rolling shutter: pulse when second Y-sync appears.
Digital input (active high). Global system reset.
Digital input (active high). Enables electrical black in
output amplifier.
Digital output. Diagnostic end-of-scan of X-register.
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