CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet - Page 44

• Manufacturer Part Number: CYII5SC1300AA-QDC
• Description: IC SENSOR IMMAGE COLOR 84-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

• Pixel Size: 6.7µm x 6.7µm
• Active Pixel Array: 1280H x 1024V
• Frames Per Second: 27
• Voltage - Supply: 3 V ~ 4.5 V
• Package / Case: 84-LCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.2 Synchronous shutter: single slope integration
S
Thold > 7.5 ns). The pulse width of both signals should be minimum 1 S
As long as S
T
T
T
T
T
T
S_START
1
2
3
4
5
int
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Cypress Semiconductor Corporation
IBIS5-A-1300
Time counted by the integration timer until the value of I
reached. The integration timer is clocked by the granulated SS-sequencer clock.
T
There are no constraints for this time. The user can use the T
trigger the S
both signal can’t be tied together.
During this time, the SS-sequencer applies the control signals to reset the image
core and start integration. This takes 4 granulated SS-sequencer clock periods. The
integration time counter starts counting at the first rising edge after the falling edge
of S
The SS-sequencer puts the image core in a readable state. It takes 2 granulated SS-
sequencer clock periods.
The “real” integration or exposure time.
IME_OUT
Datasheet
S_START
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and S
S_START
S_STOP
signal stays high for 1 granulated SS-sequencer clock period.
S_STOP
.
Figure 22: Synchronous shutter: single slope integration
or S
should change on the falling edge of the S
pin (or use an external counter to trigger S
S_STOP
Document #: 38-05710 Rev.**(Revision 1.3)
are asserted, the sequencer stays in a suspended state.
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San Jose, CA 95134
YS_CLOCK (
S_STOP)
Page 44 of 67
NT_TIME
IME_OUT
YS
408-943-2600
_
CLOCK
although that
Tsetup and
register is
signal to
cycle.